drivers/net/ethernet/chelsio/cxgb/sge.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/chelsio/cxgb/sge.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/chelsio/cxgb/sge.c- Extension
.c- Size
- 59467 bytes
- Lines
- 2157
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
common.hlinux/types.hlinux/errno.hlinux/pci.hlinux/ktime.hlinux/netdevice.hlinux/etherdevice.hlinux/if_vlan.hlinux/skbuff.hlinux/mm.hlinux/tcp.hlinux/ip.hlinux/in.hlinux/if_arp.hlinux/slab.hlinux/prefetch.hcpl5_cmd.hsge.hregs.hespi.h
Detected Declarations
struct cmdQ_estruct freelQ_estruct respQ_estruct cmdQ_estruct freelQ_estruct respQ_estruct cmdQ_cestruct freelQ_cestruct cmdQstruct freelQstruct respQstruct sched_portstruct schedstruct sgefunction tx_sched_stopfunction t1_sched_update_parmsfunction t1_sched_max_avail_bytesfunction t1_sched_set_drain_bits_per_usfunction tx_sched_initfunction sched_update_availfunction sched_skbfunction descriptorfunction free_freelQ_buffersfunction free_rx_resourcesfunction alloc_rx_resourcesfunction free_cmdQ_buffersfunction free_tx_resourcesfunction alloc_tx_resourcesfunction setup_ring_paramsfunction t1_vlan_modefunction configure_sgefunction jumbo_payload_capacityfunction t1_sge_destroyfunction Qfunction freelQs_emptyfunction t1_sge_intr_disablefunction t1_sge_intr_enablefunction t1_sge_intr_clearfunction t1_sge_intr_error_handlerfunction t1_sge_get_port_statsfunction recycle_fl_buffunction packetfunction SGE_TX_DESC_MAX_PLENfunction write_tx_descfunction write_tx_descs_large_pagefunction write_tx_descsfunction reclaim_completed_txfunction restart_sched
Annotated Snippet
struct cmdQ_e {
u32 addr_lo;
u32 len_gen;
u32 flags;
u32 addr_hi;
};
struct freelQ_e {
u32 addr_lo;
u32 len_gen;
u32 gen2;
u32 addr_hi;
};
struct respQ_e {
u32 Qsleeping : 4;
u32 Cmdq1CreditReturn : 5;
u32 Cmdq1DmaComplete : 5;
u32 Cmdq0CreditReturn : 5;
u32 Cmdq0DmaComplete : 5;
u32 FreelistQid : 2;
u32 CreditValid : 1;
u32 DataValid : 1;
u32 Offload : 1;
u32 Eop : 1;
u32 Sop : 1;
u32 GenerationBit : 1;
u32 BufferLength;
};
#elif defined(__LITTLE_ENDIAN_BITFIELD)
struct cmdQ_e {
u32 len_gen;
u32 addr_lo;
u32 addr_hi;
u32 flags;
};
struct freelQ_e {
u32 len_gen;
u32 addr_lo;
u32 addr_hi;
u32 gen2;
};
struct respQ_e {
u32 BufferLength;
u32 GenerationBit : 1;
u32 Sop : 1;
u32 Eop : 1;
u32 Offload : 1;
u32 DataValid : 1;
u32 CreditValid : 1;
u32 FreelistQid : 2;
u32 Cmdq0DmaComplete : 5;
u32 Cmdq0CreditReturn : 5;
u32 Cmdq1DmaComplete : 5;
u32 Cmdq1CreditReturn : 5;
u32 Qsleeping : 4;
} ;
#endif
/*
* SW Context Command and Freelist Queue Descriptors
*/
struct cmdQ_ce {
struct sk_buff *skb;
DEFINE_DMA_UNMAP_ADDR(dma_addr);
DEFINE_DMA_UNMAP_LEN(dma_len);
};
struct freelQ_ce {
struct sk_buff *skb;
DEFINE_DMA_UNMAP_ADDR(dma_addr);
DEFINE_DMA_UNMAP_LEN(dma_len);
};
/*
* SW command, freelist and response rings
*/
struct cmdQ {
unsigned long status; /* HW DMA fetch status */
unsigned int in_use; /* # of in-use command descriptors */
unsigned int size; /* # of descriptors */
unsigned int processed; /* total # of descs HW has processed */
unsigned int cleaned; /* total # of descs SW has reclaimed */
unsigned int stop_thres; /* SW TX queue suspend threshold */
u16 pidx; /* producer index (SW) */
u16 cidx; /* consumer index (HW) */
u8 genbit; /* current generation (=valid) bit */
u8 sop; /* is next entry start of packet? */
Annotation
- Immediate include surface: `common.h`, `linux/types.h`, `linux/errno.h`, `linux/pci.h`, `linux/ktime.h`, `linux/netdevice.h`, `linux/etherdevice.h`, `linux/if_vlan.h`.
- Detected declarations: `struct cmdQ_e`, `struct freelQ_e`, `struct respQ_e`, `struct cmdQ_e`, `struct freelQ_e`, `struct respQ_e`, `struct cmdQ_ce`, `struct freelQ_ce`, `struct cmdQ`, `struct freelQ`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.