drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c- Extension
.c- Size
- 89104 bytes
- Lines
- 3471
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/init.hlinux/pci.hlinux/dma-mapping.hlinux/netdevice.hlinux/etherdevice.hlinux/if_vlan.hlinux/mdio.hlinux/sockios.hlinux/workqueue.hlinux/proc_fs.hlinux/rtnetlink.hlinux/firmware.hlinux/log2.hlinux/stringify.hlinux/sched.hlinux/slab.hlinux/uaccess.hlinux/nospec.hcommon.hcxgb3_ioctl.hregs.hcxgb3_offload.hversion.hcxgb3_ctl_defs.ht3_cpl.hfirmware_exports.h
Detected Declarations
function link_reportfunction enable_tx_fifo_drainfunction disable_tx_fifo_drainfunction t3_os_link_faultfunction t3_os_link_changedfunction t3_os_phymod_changedfunction cxgb_set_rxmodefunction link_startfunction cxgb_disable_msifunction t3_async_intr_handlerfunction name_msix_vecsfunction for_each_portfunction request_msix_data_irqsfunction for_each_portfunction free_irq_resourcesfunction await_mgmt_repliesfunction init_tp_parityfunction setup_rssfunction ring_dbsfunction init_napifunction quiesce_rxfunction enable_all_napifunction setup_sge_qsetsfunction for_each_portfunction attr_showfunction attr_storefunction set_nfiltersfunction store_nfiltersfunction set_nserversfunction store_nserversfunction tm_attr_showfunction tm_attr_storefunction offload_txfunction write_smt_entryfunction init_smtfunction init_port_mtusfunction send_pktsched_cmdfunction bind_qsetsfunction for_each_portfunction t3_get_edc_fwfunction upgrade_fwfunction t3rev2charfunction update_tpsramfunction t3_synchronize_rxfunction cxgb_vlan_modefunction cxgb_upfunction cxgb_downfunction schedule_chk_task
Annotated Snippet
static const struct net_device_ops cxgb_netdev_ops = {
.ndo_open = cxgb_open,
.ndo_stop = cxgb_close,
.ndo_start_xmit = t3_eth_xmit,
.ndo_get_stats = cxgb_get_stats,
.ndo_validate_addr = eth_validate_addr,
.ndo_set_rx_mode = cxgb_set_rxmode,
.ndo_eth_ioctl = cxgb_ioctl,
.ndo_siocdevprivate = cxgb_siocdevprivate,
.ndo_change_mtu = cxgb_change_mtu,
.ndo_set_mac_address = cxgb_set_mac_addr,
.ndo_fix_features = cxgb_fix_features,
.ndo_set_features = cxgb_set_features,
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = cxgb_netpoll,
#endif
};
static void cxgb3_init_iscsi_mac(struct net_device *dev)
{
struct port_info *pi = netdev_priv(dev);
memcpy(pi->iscsic.mac_addr, dev->dev_addr, ETH_ALEN);
pi->iscsic.mac_addr[3] |= 0x80;
}
#define TSO_FLAGS (NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN)
#define VLAN_FEAT (NETIF_F_SG | NETIF_F_IP_CSUM | TSO_FLAGS | \
NETIF_F_IPV6_CSUM | NETIF_F_HIGHDMA)
static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
int i, err;
resource_size_t mmio_start, mmio_len;
const struct adapter_info *ai;
struct adapter *adapter = NULL;
struct port_info *pi;
if (!cxgb3_wq) {
cxgb3_wq = create_singlethread_workqueue(DRV_NAME);
if (!cxgb3_wq) {
pr_err("cannot initialize work queue\n");
return -ENOMEM;
}
}
err = pci_enable_device(pdev);
if (err) {
dev_err(&pdev->dev, "cannot enable PCI device\n");
goto out;
}
err = pci_request_regions(pdev, DRV_NAME);
if (err) {
/* Just info, some other driver may have claimed the device. */
dev_info(&pdev->dev, "cannot obtain PCI resources\n");
goto out_disable_device;
}
err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
if (err) {
dev_err(&pdev->dev, "no usable DMA configuration\n");
goto out_release_regions;
}
pci_set_master(pdev);
pci_save_state(pdev);
mmio_start = pci_resource_start(pdev, 0);
mmio_len = pci_resource_len(pdev, 0);
ai = t3_get_adapter_info(ent->driver_data);
adapter = kzalloc_obj(*adapter);
if (!adapter) {
err = -ENOMEM;
goto out_release_regions;
}
adapter->nofail_skb =
alloc_skb(sizeof(struct cpl_set_tcb_field), GFP_KERNEL);
if (!adapter->nofail_skb) {
dev_err(&pdev->dev, "cannot allocate nofail buffer\n");
err = -ENOMEM;
goto out_free_adapter;
}
adapter->regs = ioremap(mmio_start, mmio_len);
if (!adapter->regs) {
dev_err(&pdev->dev, "cannot map device registers\n");
err = -ENOMEM;
goto out_free_adapter_nofail;
Annotation
- Immediate include surface: `linux/module.h`, `linux/init.h`, `linux/pci.h`, `linux/dma-mapping.h`, `linux/netdevice.h`, `linux/etherdevice.h`, `linux/if_vlan.h`, `linux/mdio.h`.
- Detected declarations: `function link_report`, `function enable_tx_fifo_drain`, `function disable_tx_fifo_drain`, `function t3_os_link_fault`, `function t3_os_link_changed`, `function t3_os_phymod_changed`, `function cxgb_set_rxmode`, `function link_start`, `function cxgb_disable_msi`, `function t3_async_intr_handler`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.