drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h
Extension
.h
Size
5877 bytes
Lines
178
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _FIRMWARE_EXPORTS_H_
#define _FIRMWARE_EXPORTS_H_

/* WR OPCODES supported by the firmware.
 */
#define	FW_WROPCODE_FORWARD			0x01
#define FW_WROPCODE_BYPASS			0x05

#define FW_WROPCODE_TUNNEL_TX_PKT		0x03

#define FW_WROPOCDE_ULPTX_DATA_SGL		0x00
#define FW_WROPCODE_ULPTX_MEM_READ		0x02
#define FW_WROPCODE_ULPTX_PKT			0x04
#define FW_WROPCODE_ULPTX_INVALIDATE		0x06

#define FW_WROPCODE_TUNNEL_RX_PKT		0x07

#define FW_WROPCODE_OFLD_GETTCB_RPL		0x08
#define FW_WROPCODE_OFLD_CLOSE_CON		0x09
#define FW_WROPCODE_OFLD_TP_ABORT_CON_REQ	0x0A
#define FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL	0x0F
#define FW_WROPCODE_OFLD_HOST_ABORT_CON_REQ	0x0B
#define FW_WROPCODE_OFLD_TP_ABORT_CON_RPL	0x0C
#define FW_WROPCODE_OFLD_TX_DATA		0x0D
#define FW_WROPCODE_OFLD_TX_DATA_ACK		0x0E

#define FW_WROPCODE_RI_RDMA_INIT		0x10
#define FW_WROPCODE_RI_RDMA_WRITE		0x11
#define FW_WROPCODE_RI_RDMA_READ_REQ		0x12
#define FW_WROPCODE_RI_RDMA_READ_RESP		0x13
#define FW_WROPCODE_RI_SEND			0x14
#define FW_WROPCODE_RI_TERMINATE		0x15
#define FW_WROPCODE_RI_RDMA_READ		0x16
#define FW_WROPCODE_RI_RECEIVE			0x17
#define FW_WROPCODE_RI_BIND_MW			0x18
#define FW_WROPCODE_RI_FASTREGISTER_MR		0x19
#define FW_WROPCODE_RI_LOCAL_INV		0x1A
#define FW_WROPCODE_RI_MODIFY_QP		0x1B
#define FW_WROPCODE_RI_BYPASS			0x1C

#define FW_WROPOCDE_RSVD			0x1E

#define FW_WROPCODE_SGE_EGRESSCONTEXT_RR	0x1F

#define FW_WROPCODE_MNGT			0x1D
#define FW_MNGTOPCODE_PKTSCHED_SET		0x00

/* Maximum size of a WR sent from the host, limited by the SGE.
 *
 * Note: WR coming from ULP or TP are only limited by CIM.
 */
#define FW_WR_SIZE			128

/* Maximum number of outstanding WRs sent from the host. Value must be
 * programmed in the CTRL/TUNNEL/QP SGE Egress Context and used by
 * offload modules to limit the number of WRs per connection.
 */
#define FW_T3_WR_NUM			16
#define FW_N3_WR_NUM			7

#ifndef N3
# define FW_WR_NUM			FW_T3_WR_NUM
#else
# define FW_WR_NUM			FW_N3_WR_NUM
#endif

/* FW_TUNNEL_NUM corresponds to the number of supported TUNNEL Queues. These
 * queues must start at SGE Egress Context FW_TUNNEL_SGEEC_START and must
 * start at 'TID' (or 'uP Token') FW_TUNNEL_TID_START.
 *
 * Ingress Traffic (e.g. DMA completion credit)  for TUNNEL Queue[i] is sent
 * to RESP Queue[i].
 */
#define FW_TUNNEL_NUM			8
#define FW_TUNNEL_SGEEC_START		8
#define FW_TUNNEL_TID_START		65544

/* FW_CTRL_NUM corresponds to the number of supported CTRL Queues. These queues
 * must start at SGE Egress Context FW_CTRL_SGEEC_START and must start at 'TID'
 * (or 'uP Token') FW_CTRL_TID_START.
 *
 * Ingress Traffic for CTRL Queue[i] is sent to RESP Queue[i].
 */
#define FW_CTRL_NUM			8
#define FW_CTRL_SGEEC_START		65528
#define FW_CTRL_TID_START		65536

/* FW_OFLD_NUM corresponds to the number of supported OFFLOAD Queues. These
 * queues must start at SGE Egress Context FW_OFLD_SGEEC_START.
 *

Annotation

Implementation Notes