drivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.h- Extension
.h- Size
- 4687 bytes
- Lines
- 154
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/netdevice.hlinux/dcbnl.hnet/dcbnl.h
Detected Declarations
struct port_dcb_infostruct app_priorityenum cxgb4_dcb_stateenum cxgb4_dcb_state_inputenum cxgb4_dcb_fw_msgsfunction bitswap_1function cxgb4_dcb_state_init
Annotated Snippet
struct port_dcb_info {
enum cxgb4_dcb_state state; /* DCB State Machine */
enum cxgb4_dcb_fw_msgs msgs; /* DCB Firmware messages received */
unsigned int supported; /* OS DCB capabilities supported */
bool enabled; /* OS Enabled state */
/* Cached copies of DCB information sent by the firmware (in Host
* Native Endian format).
*/
u32 pgid; /* Priority Group[0..7] */
u8 dcb_version; /* Running DCBx version */
u8 pfcen; /* Priority Flow Control[0..7] */
u8 pg_num_tcs_supported; /* max PG Traffic Classes */
u8 pfc_num_tcs_supported; /* max PFC Traffic Classes */
u8 pgrate[8]; /* Priority Group Rate[0..7] */
u8 priorate[8]; /* Priority Rate[0..7] */
u8 tsa[8]; /* TSA Algorithm[0..7] */
struct app_priority { /* Application Information */
u8 user_prio_map; /* Priority Map bitfield */
u8 sel_field; /* Protocol ID interpretation */
u16 protocolid; /* Protocol ID */
} app_priority[CXGB4_MAX_DCBX_APP_SUPPORTED];
};
void cxgb4_dcb_state_init(struct net_device *);
void cxgb4_dcb_version_init(struct net_device *);
void cxgb4_dcb_reset(struct net_device *dev);
void cxgb4_dcb_state_fsm(struct net_device *, enum cxgb4_dcb_state_input);
void cxgb4_dcb_handle_fw_update(struct adapter *, const struct fw_port_cmd *);
extern const struct dcbnl_rtnl_ops cxgb4_dcb_ops;
static inline __u8 bitswap_1(unsigned char val)
{
return ((val & 0x80) >> 7) |
((val & 0x40) >> 5) |
((val & 0x20) >> 3) |
((val & 0x10) >> 1) |
((val & 0x08) << 1) |
((val & 0x04) << 3) |
((val & 0x02) << 5) |
((val & 0x01) << 7);
}
extern const char * const dcb_ver_array[];
#define CXGB4_DCB_ENABLED true
#else /* !CONFIG_CHELSIO_T4_DCB */
static inline void cxgb4_dcb_state_init(struct net_device *dev)
{
}
#define CXGB4_DCB_ENABLED false
#endif /* !CONFIG_CHELSIO_T4_DCB */
#endif /* __CXGB4_DCB_H */
Annotation
- Immediate include surface: `linux/netdevice.h`, `linux/dcbnl.h`, `net/dcbnl.h`.
- Detected declarations: `struct port_dcb_info`, `struct app_priority`, `enum cxgb4_dcb_state`, `enum cxgb4_dcb_state_input`, `enum cxgb4_dcb_fw_msgs`, `function bitswap_1`, `function cxgb4_dcb_state_init`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.