drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c- Extension
.c- Size
- 195154 bytes
- Lines
- 7253
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitmap.hlinux/crc32.hlinux/ctype.hlinux/debugfs.hlinux/err.hlinux/etherdevice.hlinux/firmware.hlinux/if.hlinux/if_vlan.hlinux/init.hlinux/log2.hlinux/mdio.hlinux/module.hlinux/moduleparam.hlinux/mutex.hlinux/netdevice.hlinux/pci.hlinux/rtnetlink.hlinux/sched.hlinux/seq_file.hlinux/sockios.hlinux/vmalloc.hlinux/workqueue.hnet/neighbour.hnet/netevent.hnet/addrconf.hnet/bonding.hlinux/uaccess.hlinux/crash_dump.hnet/udp_tunnel.hnet/xfrm.hnet/tls.h
Detected Declarations
function link_reportfunction dcb_tx_queue_prio_enablefunction cxgb4_dcb_enabledfunction t4_os_link_changedfunction t4_os_portmod_changedfunction cxgb4_set_addr_hashfunction cxgb4_mac_syncfunction cxgb4_mac_unsyncfunction set_rxmodefunction cxgb4_change_macfunction list_for_each_entryfunction link_startfunction dcb_rplfunction fwevtq_handlerfunction disable_msifunction t4_nondata_intrfunction cxgb4_set_msix_afffunction cxgb4_clear_msix_afffunction request_msix_queue_irqsfunction for_each_ethrxqfunction free_msix_queue_irqsfunction setup_ppod_edramfunction adap_config_hpfilterfunction cxgb4_config_rssfunction cxgb4_write_rssfunction setup_rssfunction for_each_portfunction rxq_to_chanfunction cxgb4_quiesce_rxfunction quiesce_rxfunction disable_interruptsfunction cxgb4_enable_rxfunction enable_rxfunction setup_non_data_intrfunction setup_fw_sge_queuesfunction setup_sge_queuesfunction for_each_portfunction for_each_portfunction cxgb_select_queuefunction closest_timerfunction closest_thresfunction cxgb4_set_rspq_intr_paramsfunction cxgb_set_featuresfunction setup_debugfsfunction cxgb4_port_mirror_free_rxqfunction cxgb4_port_mirror_alloc_queuesfunction cxgb4_port_mirror_free_queuesfunction cxgb4_port_mirror_start
Annotated Snippet
static struct pci_driver cxgb4_driver;
static void check_neigh_update(struct neighbour *neigh)
{
const struct device *parent;
const struct net_device *netdev = neigh->dev;
if (is_vlan_dev(netdev))
netdev = vlan_dev_real_dev(netdev);
parent = netdev->dev.parent;
if (parent && parent->driver == &cxgb4_driver.driver)
t4_l2t_update(dev_get_drvdata(parent), neigh);
}
static int netevent_cb(struct notifier_block *nb, unsigned long event,
void *data)
{
switch (event) {
case NETEVENT_NEIGH_UPDATE:
check_neigh_update(data);
break;
case NETEVENT_REDIRECT:
default:
break;
}
return 0;
}
static bool netevent_registered;
static struct notifier_block cxgb4_netevent_nb = {
.notifier_call = netevent_cb
};
static void drain_db_fifo(struct adapter *adap, int usecs)
{
u32 v1, v2, lp_count, hp_count;
do {
v1 = t4_read_reg(adap, SGE_DBFIFO_STATUS_A);
v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2_A);
if (is_t4(adap->params.chip)) {
lp_count = LP_COUNT_G(v1);
hp_count = HP_COUNT_G(v1);
} else {
lp_count = LP_COUNT_T5_G(v1);
hp_count = HP_COUNT_T5_G(v2);
}
if (lp_count == 0 && hp_count == 0)
break;
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(usecs_to_jiffies(usecs));
} while (1);
}
static void disable_txq_db(struct sge_txq *q)
{
unsigned long flags;
spin_lock_irqsave(&q->db_lock, flags);
q->db_disabled = 1;
spin_unlock_irqrestore(&q->db_lock, flags);
}
static void enable_txq_db(struct adapter *adap, struct sge_txq *q)
{
spin_lock_irq(&q->db_lock);
if (q->db_pidx_inc) {
/* Make sure that all writes to the TX descriptors
* are committed before we tell HW about them.
*/
wmb();
t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL_A),
QID_V(q->cntxt_id) | PIDX_V(q->db_pidx_inc));
q->db_pidx_inc = 0;
}
q->db_disabled = 0;
spin_unlock_irq(&q->db_lock);
}
static void disable_dbs(struct adapter *adap)
{
int i;
for_each_ethrxq(&adap->sge, i)
disable_txq_db(&adap->sge.ethtxq[i].q);
if (is_offload(adap)) {
struct sge_uld_txq_info *txq_info =
adap->sge.uld_txq_info[CXGB4_TX_OFLD];
Annotation
- Immediate include surface: `linux/bitmap.h`, `linux/crc32.h`, `linux/ctype.h`, `linux/debugfs.h`, `linux/err.h`, `linux/etherdevice.h`, `linux/firmware.h`, `linux/if.h`.
- Detected declarations: `function link_report`, `function dcb_tx_queue_prio_enable`, `function cxgb4_dcb_enabled`, `function t4_os_link_changed`, `function t4_os_portmod_changed`, `function cxgb4_set_addr_hash`, `function cxgb4_mac_sync`, `function cxgb4_mac_unsync`, `function set_rxmode`, `function cxgb4_change_mac`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.