drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
Extension
.h
Size
131533 bytes
Lines
4188
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct fw_wr_hdr {
	__be32 hi;
	__be32 lo;
};

/* work request opcode (hi) */
#define FW_WR_OP_S	24
#define FW_WR_OP_M      0xff
#define FW_WR_OP_V(x)   ((x) << FW_WR_OP_S)
#define FW_WR_OP_G(x)   (((x) >> FW_WR_OP_S) & FW_WR_OP_M)

/* atomic flag (hi) - firmware encapsulates CPLs in CPL_BARRIER */
#define FW_WR_ATOMIC_S		23
#define FW_WR_ATOMIC_V(x)	((x) << FW_WR_ATOMIC_S)

/* flush flag (hi) - firmware flushes flushable work request buffered
 * in the flow context.
 */
#define FW_WR_FLUSH_S     22
#define FW_WR_FLUSH_V(x)  ((x) << FW_WR_FLUSH_S)

/* completion flag (hi) - firmware generates a cpl_fw6_ack */
#define FW_WR_COMPL_S     21
#define FW_WR_COMPL_V(x)  ((x) << FW_WR_COMPL_S)
#define FW_WR_COMPL_F     FW_WR_COMPL_V(1U)

/* work request immediate data length (hi) */
#define FW_WR_IMMDLEN_S 0
#define FW_WR_IMMDLEN_M 0xff
#define FW_WR_IMMDLEN_V(x)      ((x) << FW_WR_IMMDLEN_S)

/* egress queue status update to associated ingress queue entry (lo) */
#define FW_WR_EQUIQ_S           31
#define FW_WR_EQUIQ_V(x)        ((x) << FW_WR_EQUIQ_S)
#define FW_WR_EQUIQ_F           FW_WR_EQUIQ_V(1U)

/* egress queue status update to egress queue status entry (lo) */
#define FW_WR_EQUEQ_S           30
#define FW_WR_EQUEQ_V(x)        ((x) << FW_WR_EQUEQ_S)
#define FW_WR_EQUEQ_F           FW_WR_EQUEQ_V(1U)

/* flow context identifier (lo) */
#define FW_WR_FLOWID_S          8
#define FW_WR_FLOWID_V(x)       ((x) << FW_WR_FLOWID_S)

/* length in units of 16-bytes (lo) */
#define FW_WR_LEN16_S           0
#define FW_WR_LEN16_V(x)        ((x) << FW_WR_LEN16_S)

#define HW_TPL_FR_MT_PR_IV_P_FC         0X32B
#define HW_TPL_FR_MT_PR_OV_P_FC         0X327

/* filter wr reply code in cookie in CPL_SET_TCB_RPL */
enum fw_filter_wr_cookie {
	FW_FILTER_WR_SUCCESS,
	FW_FILTER_WR_FLT_ADDED,
	FW_FILTER_WR_FLT_DELETED,
	FW_FILTER_WR_SMT_TBL_FULL,
	FW_FILTER_WR_EINVAL,
};

struct fw_filter_wr {
	__be32 op_pkd;
	__be32 len16_pkd;
	__be64 r3;
	__be32 tid_to_iq;
	__be32 del_filter_to_l2tix;
	__be16 ethtype;
	__be16 ethtypem;
	__u8   frag_to_ovlan_vldm;
	__u8   smac_sel;
	__be16 rx_chan_rx_rpl_iq;
	__be32 maci_to_matchtypem;
	__u8   ptcl;
	__u8   ptclm;
	__u8   ttyp;
	__u8   ttypm;
	__be16 ivlan;
	__be16 ivlanm;
	__be16 ovlan;
	__be16 ovlanm;
	__u8   lip[16];
	__u8   lipm[16];
	__u8   fip[16];
	__u8   fipm[16];
	__be16 lp;
	__be16 lpm;
	__be16 fp;
	__be16 fpm;
	__be16 r7;

Annotation

Implementation Notes