drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h
Extension
.h
Size
13801 bytes
Lines
423
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct t4vf_port_stats {
	/*
	 * TX statistics.
	 */
	u64 tx_bcast_bytes;		/* broadcast */
	u64 tx_bcast_frames;
	u64 tx_mcast_bytes;		/* multicast */
	u64 tx_mcast_frames;
	u64 tx_ucast_bytes;		/* unicast */
	u64 tx_ucast_frames;
	u64 tx_drop_frames;		/* TX dropped frames */
	u64 tx_offload_bytes;		/* offload */
	u64 tx_offload_frames;

	/*
	 * RX statistics.
	 */
	u64 rx_bcast_bytes;		/* broadcast */
	u64 rx_bcast_frames;
	u64 rx_mcast_bytes;		/* multicast */
	u64 rx_mcast_frames;
	u64 rx_ucast_bytes;
	u64 rx_ucast_frames;		/* unicast */

	u64 rx_err_frames;		/* RX error frames */
};

/*
 * Per-"port" (Virtual Interface) link configuration ...
 */
typedef u16 fw_port_cap16_t;    /* 16-bit Port Capabilities integral value */
typedef u32 fw_port_cap32_t;    /* 32-bit Port Capabilities integral value */

enum fw_caps {
	FW_CAPS_UNKNOWN	= 0,	/* 0'ed out initial state */
	FW_CAPS16	= 1,	/* old Firmware: 16-bit Port Capabilities */
	FW_CAPS32	= 2,	/* new Firmware: 32-bit Port Capabilities */
};

enum cc_pause {
	PAUSE_RX	= 1 << 0,
	PAUSE_TX	= 1 << 1,
	PAUSE_AUTONEG	= 1 << 2
};

enum cc_fec {
	FEC_AUTO	= 1 << 0,	/* IEEE 802.3 "automatic" */
	FEC_RS		= 1 << 1,	/* Reed-Solomon */
	FEC_BASER_RS	= 1 << 2,	/* BaseR/Reed-Solomon */
};

struct link_config {
	fw_port_cap32_t pcaps;		/* link capabilities */
	fw_port_cap32_t	acaps;		/* advertised capabilities */
	fw_port_cap32_t	lpacaps;	/* peer advertised capabilities */

	fw_port_cap32_t	speed_caps;	/* speed(s) user has requested */
	u32		speed;		/* actual link speed */

	enum cc_pause	requested_fc;	/* flow control user has requested */
	enum cc_pause	fc;		/* actual link flow control */
	enum cc_pause   advertised_fc;  /* actual advertised flow control */

	enum cc_fec	auto_fec;	/* Forward Error Correction: */
	enum cc_fec	requested_fec;	/*   "automatic" (IEEE 802.3), */
	enum cc_fec	fec;		/*   requested, and actual in use */

	unsigned char	autoneg;	/* autonegotiating? */

	unsigned char	link_ok;	/* link up? */
	unsigned char	link_down_rc;	/* link down reason */
};

/* Return true if the Link Configuration supports "High Speeds" (those greater
 * than 1Gb/s).
 */
static inline bool is_x_10g_port(const struct link_config *lc)
{
	fw_port_cap32_t speeds, high_speeds;

	speeds = FW_PORT_CAP32_SPEED_V(FW_PORT_CAP32_SPEED_G(lc->pcaps));
	high_speeds =
		speeds & ~(FW_PORT_CAP32_SPEED_100M | FW_PORT_CAP32_SPEED_1G);

	return high_speeds != 0;
}

/*
 * General device parameters ...
 */

Annotation

Implementation Notes