drivers/net/ethernet/cirrus/cs89x0.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/cirrus/cs89x0.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/cirrus/cs89x0.h
Extension
.h
Size
16097 bytes
Lines
462
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation, version 1.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
   */


#define PP_ChipID 0x0000	/* offset   0h -> Corp -ID              */
				/* offset   2h -> Model/Product Number  */
				/* offset   3h -> Chip Revision Number  */

#define PP_ISAIOB 0x0020	/*  IO base address */
#define PP_CS8900_ISAINT 0x0022	/*  ISA interrupt select */
#define PP_CS8920_ISAINT 0x0370	/*  ISA interrupt select */
#define PP_CS8900_ISADMA 0x0024	/*  ISA Rec DMA channel */
#define PP_CS8920_ISADMA 0x0374	/*  ISA Rec DMA channel */
#define PP_ISASOF 0x0026	/*  ISA DMA offset */
#define PP_DmaFrameCnt 0x0028	/*  ISA DMA Frame count */
#define PP_DmaByteCnt 0x002A	/*  ISA DMA Byte count */
#define PP_CS8900_ISAMemB 0x002C	/*  Memory base */
#define PP_CS8920_ISAMemB 0x0348 /*  */

#define PP_ISABootBase 0x0030	/*  Boot Prom base  */
#define PP_ISABootMask 0x0034	/*  Boot Prom Mask */

/* EEPROM data and command registers */
#define PP_EECMD 0x0040		/*  NVR Interface Command register */
#define PP_EEData 0x0042	/*  NVR Interface Data Register */
#define PP_DebugReg 0x0044	/*  Debug Register */

#define PP_RxCFG 0x0102		/*  Rx Bus config */
#define PP_RxCTL 0x0104		/*  Receive Control Register */
#define PP_TxCFG 0x0106		/*  Transmit Config Register */
#define PP_TxCMD 0x0108		/*  Transmit Command Register */
#define PP_BufCFG 0x010A	/*  Bus configuration Register */
#define PP_LineCTL 0x0112	/*  Line Config Register */
#define PP_SelfCTL 0x0114	/*  Self Command Register */
#define PP_BusCTL 0x0116	/*  ISA bus control Register */
#define PP_TestCTL 0x0118	/*  Test Register */
#define PP_AutoNegCTL 0x011C	/*  Auto Negotiation Ctrl */

#define PP_ISQ 0x0120		/*  Interrupt Status */
#define PP_RxEvent 0x0124	/*  Rx Event Register */
#define PP_TxEvent 0x0128	/*  Tx Event Register */
#define PP_BufEvent 0x012C	/*  Bus Event Register */
#define PP_RxMiss 0x0130	/*  Receive Miss Count */
#define PP_TxCol 0x0132		/*  Transmit Collision Count */
#define PP_LineST 0x0134	/*  Line State Register */
#define PP_SelfST 0x0136	/*  Self State register */
#define PP_BusST 0x0138		/*  Bus Status */
#define PP_TDR 0x013C		/*  Time Domain Reflectometry */
#define PP_AutoNegST 0x013E	/*  Auto Neg Status */
#define PP_TxCommand 0x0144	/*  Tx Command */
#define PP_TxLength 0x0146	/*  Tx Length */
#define PP_LAF 0x0150		/*  Hash Table */
#define PP_IA 0x0158		/*  Physical Address Register */

#define PP_RxStatus 0x0400	/*  Receive start of frame */
#define PP_RxLength 0x0402	/*  Receive Length of frame */
#define PP_RxFrame 0x0404	/*  Receive frame pointer */
#define PP_TxFrame 0x0A00	/*  Transmit frame pointer */

/*  Primary I/O Base Address. If no I/O base is supplied by the user, then this */
/*  can be used as the default I/O base to access the PacketPage Area. */
#define DEFAULTIOBASE 0x0300
#define FIRST_IO 0x020C		/*  First I/O port to check */
#define LAST_IO 0x037C		/*  Last I/O port to check (+10h) */
#define ADD_MASK 0x3000		/*  Mask it use of the ADD_PORT register */
#define ADD_SIG 0x3000		/*  Expected ID signature */

/* On Macs, we only need use the ISA I/O stuff until we do MEMORY_ON */
#ifdef CONFIG_MAC
#define LCSLOTBASE 0xfee00000
#define MMIOBASE 0x40000
#endif

#define CHIP_EISA_ID_SIG 0x630E   /*  Product ID Code for Crystal Chip (CS8900 spec 4.3) */
#define CHIP_EISA_ID_SIG_STR "0x630E"

#ifdef IBMEIPKT
#define EISA_ID_SIG 0x4D24	/*  IBM */
#define PART_NO_SIG 0x1010	/*  IBM */

Annotation

Implementation Notes