drivers/net/ethernet/cisco/enic/enic.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/cisco/enic/enic.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/cisco/enic/enic.h- Extension
.h- Size
- 11475 bytes
- Lines
- 425
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
vnic_enet.hvnic_dev.hvnic_wq.hvnic_rq.hvnic_cq.hvnic_intr.hvnic_stats.hvnic_nic.hvnic_rss.hlinux/irq.hnet/page_pool/helpers.h
Detected Declarations
struct enic_msix_entrystruct enic_intr_mod_rangestruct enic_intr_mod_tablestruct enic_rx_coalstruct enic_port_profilestruct enic_rfs_fltr_nodestruct enic_rfs_flw_tblstruct vxlan_offloadstruct enic_wq_statsstruct enic_rq_statsstruct enic_wqstruct enic_rqstruct enicenum ext_cqenum enic_vf_typefunction enic_cq_rqfunction enic_cq_wqfunction enic_msix_rq_intrfunction enic_msix_wq_intrfunction enic_msix_err_intrfunction enic_msix_notify_intrfunction enic_is_err_intrfunction enic_is_notify_intrfunction enic_dma_map_check
Annotated Snippet
struct enic_msix_entry {
int requested;
char devname[IFNAMSIZ + 8];
irqreturn_t (*isr)(int, void *);
void *devid;
cpumask_var_t affinity_mask;
};
/* Store only the lower range. Higher range is given by fw. */
struct enic_intr_mod_range {
u32 small_pkt_range_start;
u32 large_pkt_range_start;
};
struct enic_intr_mod_table {
u32 rx_rate;
u32 range_percent;
};
#define ENIC_MAX_LINK_SPEEDS 3
#define ENIC_LINK_SPEED_10G 10000
#define ENIC_LINK_SPEED_4G 4000
#define ENIC_LINK_40G_INDEX 2
#define ENIC_LINK_10G_INDEX 1
#define ENIC_LINK_4G_INDEX 0
#define ENIC_RX_COALESCE_RANGE_END 125
#define ENIC_AIC_TS_BREAK 100
struct enic_rx_coal {
u32 small_pkt_range_start;
u32 large_pkt_range_start;
u32 range_end;
u32 use_adaptive_rx_coalesce;
};
/* priv_flags */
#define ENIC_SRIOV_ENABLED (1 << 0)
/* enic port profile set flags */
#define ENIC_PORT_REQUEST_APPLIED (1 << 0)
#define ENIC_SET_REQUEST (1 << 1)
#define ENIC_SET_NAME (1 << 2)
#define ENIC_SET_INSTANCE (1 << 3)
#define ENIC_SET_HOST (1 << 4)
#define MAX_TSO BIT(16)
#define WQ_ENET_MAX_DESC_LEN BIT(WQ_ENET_LEN_BITS)
#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
struct enic_port_profile {
u32 set;
u8 request;
char name[PORT_PROFILE_MAX];
u8 instance_uuid[PORT_UUID_MAX];
u8 host_uuid[PORT_UUID_MAX];
u8 vf_mac[ETH_ALEN];
u8 mac_addr[ETH_ALEN];
};
/* enic_rfs_fltr_node - rfs filter node in hash table
* @@keys: IPv4 5 tuple
* @flow_id: flow_id of clsf filter provided by kernel
* @fltr_id: filter id of clsf filter returned by adaptor
* @rq_id: desired rq index
* @node: hlist_node
*/
struct enic_rfs_fltr_node {
struct flow_keys keys;
u32 flow_id;
u16 fltr_id;
u16 rq_id;
struct hlist_node node;
};
/* enic_rfs_flw_tbl - rfs flow table
* @max: Maximum number of filters vNIC supports
* @free: Number of free filters available
* @toclean: hash table index to clean next
* @ht_head: hash table list head
* @lock: spin lock
* @rfs_may_expire: timer function for enic_rps_may_expire_flow
*/
struct enic_rfs_flw_tbl {
u16 max;
int free;
#define ENIC_RFS_FLW_BITSHIFT (10)
#define ENIC_RFS_FLW_MASK ((1 << ENIC_RFS_FLW_BITSHIFT) - 1)
u16 toclean:ENIC_RFS_FLW_BITSHIFT;
struct hlist_head ht_head[1 << ENIC_RFS_FLW_BITSHIFT];
Annotation
- Immediate include surface: `vnic_enet.h`, `vnic_dev.h`, `vnic_wq.h`, `vnic_rq.h`, `vnic_cq.h`, `vnic_intr.h`, `vnic_stats.h`, `vnic_nic.h`.
- Detected declarations: `struct enic_msix_entry`, `struct enic_intr_mod_range`, `struct enic_intr_mod_table`, `struct enic_rx_coal`, `struct enic_port_profile`, `struct enic_rfs_fltr_node`, `struct enic_rfs_flw_tbl`, `struct vxlan_offload`, `struct enic_wq_stats`, `struct enic_rq_stats`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.