drivers/net/ethernet/cisco/enic/enic_wq.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/cisco/enic/enic_wq.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/cisco/enic/enic_wq.c- Extension
.c- Size
- 3296 bytes
- Lines
- 118
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
net/netdev_queues.henic_res.henic.henic_wq.h
Detected Declarations
function enic_wq_cq_desc_decfunction enic_free_wq_buffunction enic_wq_free_buffunction enic_wq_servicefunction enic_wq_cq_service
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
// Copyright 2025 Cisco Systems, Inc. All rights reserved.
#include <net/netdev_queues.h>
#include "enic_res.h"
#include "enic.h"
#include "enic_wq.h"
#define ENET_CQ_DESC_COMP_NDX_BITS 14
#define ENET_CQ_DESC_COMP_NDX_MASK GENMASK(ENET_CQ_DESC_COMP_NDX_BITS - 1, 0)
static void enic_wq_cq_desc_dec(const struct cq_desc *desc_arg, bool ext_wq,
u8 *type, u8 *color, u16 *q_number,
u16 *completed_index)
{
const struct cq_desc *desc = desc_arg;
const u8 type_color = desc->type_color;
*color = (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;
/*
* Make sure color bit is read from desc *before* other fields
* are read from desc. Hardware guarantees color bit is last
* bit (byte) written. Adding the rmb() prevents the compiler
* and/or CPU from reordering the reads which would potentially
* result in reading stale values.
*/
rmb();
*type = type_color & CQ_DESC_TYPE_MASK;
*q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK;
if (ext_wq)
*completed_index = le16_to_cpu(desc->completed_index) &
ENET_CQ_DESC_COMP_NDX_MASK;
else
*completed_index = le16_to_cpu(desc->completed_index) &
CQ_DESC_COMP_NDX_MASK;
}
void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
{
struct enic *enic = vnic_dev_priv(wq->vdev);
if (buf->sop)
dma_unmap_single(&enic->pdev->dev, buf->dma_addr, buf->len,
DMA_TO_DEVICE);
else
dma_unmap_page(&enic->pdev->dev, buf->dma_addr, buf->len,
DMA_TO_DEVICE);
if (buf->os_buf)
dev_kfree_skb_any(buf->os_buf);
}
static void enic_wq_free_buf(struct vnic_wq *wq, struct cq_desc *cq_desc,
struct vnic_wq_buf *buf, void *opaque)
{
struct enic *enic = vnic_dev_priv(wq->vdev);
enic->wq[wq->index].stats.cq_work++;
enic->wq[wq->index].stats.cq_bytes += buf->len;
enic_free_wq_buf(wq, buf);
}
static void enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
u8 type, u16 q_number, u16 completed_index)
{
struct enic *enic = vnic_dev_priv(vdev);
spin_lock(&enic->wq[q_number].lock);
vnic_wq_service(&enic->wq[q_number].vwq, cq_desc,
completed_index, enic_wq_free_buf, NULL);
if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number))
&& vnic_wq_desc_avail(&enic->wq[q_number].vwq) >=
(MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)) {
netif_wake_subqueue(enic->netdev, q_number);
enic->wq[q_number].stats.wake++;
}
spin_unlock(&enic->wq[q_number].lock);
}
unsigned int enic_wq_cq_service(struct enic *enic, unsigned int cq_index,
unsigned int work_to_do)
{
struct vnic_cq *cq = &enic->cq[cq_index];
u16 q_number, completed_index;
Annotation
- Immediate include surface: `net/netdev_queues.h`, `enic_res.h`, `enic.h`, `enic_wq.h`.
- Detected declarations: `function enic_wq_cq_desc_dec`, `function enic_free_wq_buf`, `function enic_wq_free_buf`, `function enic_wq_service`, `function enic_wq_cq_service`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.