drivers/net/ethernet/dec/tulip/uli526x.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/dec/tulip/uli526x.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/dec/tulip/uli526x.c- Extension
.c- Size
- 46369 bytes
- Lines
- 1802
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/kernel.hlinux/string.hlinux/timer.hlinux/errno.hlinux/ioport.hlinux/interrupt.hlinux/pci.hlinux/init.hlinux/netdevice.hlinux/etherdevice.hlinux/ethtool.hlinux/skbuff.hlinux/delay.hlinux/spinlock.hlinux/dma-mapping.hlinux/bitops.hasm/processor.hasm/io.hasm/dma.hlinux/uaccess.h
Detected Declarations
struct tx_descstruct rx_descstruct uli526x_board_infostruct uli_phy_opsenum uli526x_offsetsenum uli526x_CR6_bitsfunction srom_clk_writefunction uli526x_init_onefunction uli526x_remove_onefunction uli526x_openfunction uli526x_initfunction uli526x_start_xmitfunction uli526x_stopfunction uli526x_interruptfunction uli526x_pollfunction uli526x_free_tx_pktfunction uli526x_rx_packetfunction uli526x_set_filter_modefunction ULi_ethtool_get_link_ksettingsfunction netdev_get_drvinfofunction netdev_get_link_ksettingsfunction netdev_get_linkfunction uli526x_get_wolfunction uli526x_timerfunction time_afterfunction uli526x_reset_preparefunction uli526x_dynamic_resetfunction uli526x_suspendfunction uli526x_resumefunction uli526x_free_rxbufferfunction uli526x_reuse_skbfunction uli526x_descriptor_initfunction update_cr6function send_filter_framefunction allocate_rx_bufferfunction read_srom_wordfunction uli526x_sense_speedfunction uli526x_set_phyxcerfunction uli526x_process_modefunction phy_writeby_cr9function phy_readby_cr9function phy_readby_cr10function phy_writeby_cr10function phy_write_1bitfunction phy_read_1bitfunction uli526x_init_modulefunction uli526x_cleanup_modulemodule init uli526x_init_module
Annotated Snippet
static const struct net_device_ops netdev_ops = {
.ndo_open = uli526x_open,
.ndo_stop = uli526x_stop,
.ndo_start_xmit = uli526x_start_xmit,
.ndo_set_rx_mode = uli526x_set_filter_mode,
.ndo_set_mac_address = eth_mac_addr,
.ndo_validate_addr = eth_validate_addr,
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = uli526x_poll,
#endif
};
/*
* Search ULI526X board, allocate space and register it
*/
static int uli526x_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
struct uli526x_board_info *db; /* board information structure */
struct net_device *dev;
void __iomem *ioaddr;
u8 addr[ETH_ALEN];
int i, err;
ULI526X_DBUG(0, "uli526x_init_one()", 0);
/* Init network device */
dev = alloc_etherdev(sizeof(*db));
if (dev == NULL)
return -ENOMEM;
SET_NETDEV_DEV(dev, &pdev->dev);
if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
pr_warn("32-bit PCI DMA not available\n");
err = -ENODEV;
goto err_out_free;
}
/* Enable Master/IO access, Disable memory access */
err = pci_enable_device(pdev);
if (err)
goto err_out_free;
if (!pci_resource_start(pdev, 0)) {
pr_err("I/O base is zero\n");
err = -ENODEV;
goto err_out_disable;
}
if (pci_resource_len(pdev, 0) < (ULI526X_IO_SIZE) ) {
pr_err("Allocated I/O size too small\n");
err = -ENODEV;
goto err_out_disable;
}
err = pci_request_regions(pdev, DRV_NAME);
if (err < 0) {
pr_err("Failed to request PCI regions\n");
goto err_out_disable;
}
/* Init system & device */
db = netdev_priv(dev);
/* Allocate Tx/Rx descriptor memory */
err = -ENOMEM;
db->desc_pool_ptr = dma_alloc_coherent(&pdev->dev,
sizeof(struct tx_desc) * DESC_ALL_CNT + 0x20,
&db->desc_pool_dma_ptr, GFP_KERNEL);
if (!db->desc_pool_ptr)
goto err_out_release;
db->buf_pool_ptr = dma_alloc_coherent(&pdev->dev,
TX_BUF_ALLOC * TX_DESC_CNT + 4,
&db->buf_pool_dma_ptr, GFP_KERNEL);
if (!db->buf_pool_ptr)
goto err_out_free_tx_desc;
db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr;
db->first_tx_desc_dma = db->desc_pool_dma_ptr;
db->buf_pool_start = db->buf_pool_ptr;
db->buf_pool_dma_start = db->buf_pool_dma_ptr;
switch (ent->driver_data) {
case PCI_ULI5263_ID:
db->phy.write = phy_writeby_cr10;
db->phy.read = phy_readby_cr10;
break;
Annotation
- Immediate include surface: `linux/module.h`, `linux/kernel.h`, `linux/string.h`, `linux/timer.h`, `linux/errno.h`, `linux/ioport.h`, `linux/interrupt.h`, `linux/pci.h`.
- Detected declarations: `struct tx_desc`, `struct rx_desc`, `struct uli526x_board_info`, `struct uli_phy_ops`, `enum uli526x_offsets`, `enum uli526x_CR6_bits`, `function srom_clk_write`, `function uli526x_init_one`, `function uli526x_remove_one`, `function uli526x_open`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.