drivers/net/ethernet/emulex/benet/be_cmds.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/emulex/benet/be_cmds.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/emulex/benet/be_cmds.c- Extension
.c- Size
- 129559 bytes
- Lines
- 5087
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hbe.hbe_cmds.h
Detected Declarations
function be_cmd_allowedfunction be_mcc_notifyfunction datafunction be_mcc_compl_usefunction be_skip_err_logfunction loopfunction be_mcc_compl_processfunction be_async_link_state_processfunction be_async_port_misconfig_event_processfunction be_async_grp5_cos_priority_processfunction be_async_grp5_qos_speed_processfunction be_async_grp5_pvid_state_processfunction be_async_grp5_fw_control_processfunction be_async_grp5_evt_processfunction be_async_dbg_evt_processfunction be_async_sliport_evt_processfunction is_link_state_evtfunction is_grp5_evtfunction is_dbg_evtfunction is_sliport_evtfunction be_mcc_event_processfunction be_async_mcc_enablefunction be_async_mcc_disablefunction be_process_mccfunction be_mcc_wait_complfunction be_mcc_notify_waitfunction be_mbox_db_ready_waitfunction completionfunction be_POST_stage_getfunction lancer_wait_readyfunction be_fw_wait_readyfunction fill_wrb_tagsfunction be_wrb_cmd_hdr_preparefunction be_cmd_page_addrs_preparefunction use_mccfunction be_cmd_lockfunction be_cmd_unlockfunction be_cmd_notify_waitfunction be_cmd_fw_initfunction be_cmd_fw_cleanfunction be_cmd_eq_createfunction be_cmd_mac_addr_queryfunction be_cmd_pmac_addfunction be_cmd_pmac_delfunction be_cmd_cq_createfunction be_encoded_q_lenfunction be_cmd_mccq_ext_createfunction be_cmd_mccq_org_create
Annotated Snippet
if (flags & CQE_FLAGS_VALID_MASK) {
compl->flags = flags;
return true;
}
}
return false;
}
/* Need to reset the entire word that houses the valid bit */
static inline void be_mcc_compl_use(struct be_mcc_compl *compl)
{
compl->flags = 0;
}
static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1)
{
unsigned long addr;
addr = tag1;
addr = ((addr << 16) << 16) | tag0;
return (void *)addr;
}
static bool be_skip_err_log(u8 opcode, u16 base_status, u16 addl_status)
{
if (base_status == MCC_STATUS_NOT_SUPPORTED ||
base_status == MCC_STATUS_ILLEGAL_REQUEST ||
addl_status == MCC_ADDL_STATUS_TOO_MANY_INTERFACES ||
addl_status == MCC_ADDL_STATUS_INSUFFICIENT_VLANS ||
(opcode == OPCODE_COMMON_WRITE_FLASHROM &&
(base_status == MCC_STATUS_ILLEGAL_FIELD ||
addl_status == MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH)))
return true;
else
return false;
}
/* Place holder for all the async MCC cmds wherein the caller is not in a busy
* loop (has not issued be_mcc_notify_wait())
*/
static void be_async_cmd_process(struct be_adapter *adapter,
struct be_mcc_compl *compl,
struct be_cmd_resp_hdr *resp_hdr)
{
enum mcc_base_status base_status = base_status(compl->status);
u8 opcode = 0, subsystem = 0;
if (resp_hdr) {
opcode = resp_hdr->opcode;
subsystem = resp_hdr->subsystem;
}
if (opcode == OPCODE_LOWLEVEL_LOOPBACK_TEST &&
subsystem == CMD_SUBSYSTEM_LOWLEVEL) {
complete(&adapter->et_cmd_compl);
return;
}
if (opcode == OPCODE_LOWLEVEL_SET_LOOPBACK_MODE &&
subsystem == CMD_SUBSYSTEM_LOWLEVEL) {
complete(&adapter->et_cmd_compl);
return;
}
if ((opcode == OPCODE_COMMON_WRITE_FLASHROM ||
opcode == OPCODE_COMMON_WRITE_OBJECT) &&
subsystem == CMD_SUBSYSTEM_COMMON) {
adapter->flash_status = compl->status;
complete(&adapter->et_cmd_compl);
return;
}
if ((opcode == OPCODE_ETH_GET_STATISTICS ||
opcode == OPCODE_ETH_GET_PPORT_STATS) &&
subsystem == CMD_SUBSYSTEM_ETH &&
base_status == MCC_STATUS_SUCCESS) {
be_parse_stats(adapter);
adapter->stats_cmd_sent = false;
return;
}
if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES &&
subsystem == CMD_SUBSYSTEM_COMMON) {
if (base_status == MCC_STATUS_SUCCESS) {
struct be_cmd_resp_get_cntl_addnl_attribs *resp =
(void *)resp_hdr;
adapter->hwmon_info.be_on_die_temp =
resp->on_die_temperature;
} else {
adapter->be_get_temp_freq = 0;
Annotation
- Immediate include surface: `linux/module.h`, `be.h`, `be_cmds.h`.
- Detected declarations: `function be_cmd_allowed`, `function be_mcc_notify`, `function data`, `function be_mcc_compl_use`, `function be_skip_err_log`, `function loop`, `function be_mcc_compl_process`, `function be_async_link_state_process`, `function be_async_port_misconfig_event_process`, `function be_async_grp5_cos_priority_process`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.