drivers/net/ethernet/freescale/gianfar.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/freescale/gianfar.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/freescale/gianfar.c- Extension
.c- Size
- 94250 bytes
- Lines
- 3605
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/platform_device.hlinux/string.hlinux/errno.hlinux/unistd.hlinux/slab.hlinux/interrupt.hlinux/delay.hlinux/netdevice.hlinux/etherdevice.hlinux/skbuff.hlinux/if_vlan.hlinux/spinlock.hlinux/mm.hlinux/of_address.hlinux/of_irq.hlinux/of_mdio.hlinux/ip.hlinux/tcp.hlinux/udp.hlinux/in.hlinux/net_tstamp.hasm/io.hasm/reg.hasm/mpc85xx.hasm/irq.hlinux/uaccess.hlinux/module.hlinux/dma-mapping.hlinux/crc32.hlinux/mii.hlinux/phy.h
Detected Declarations
function gfar_init_rxbdpfunction gfar_init_tx_rx_basefunction gfar_init_rqprmfunction gfar_rx_offload_enfunction gfar_mac_rx_configfunction gfar_mac_tx_configfunction gfar_configure_coalescingfunction for_each_set_bitfunction for_each_set_bitfunction gfar_configure_coalescing_allfunction gfar_get_stats64function itfunction gfar_set_mac_for_addrfunction gfar_set_mac_addrfunction gfar_ints_disablefunction gfar_ints_enablefunction gfar_alloc_tx_queuesfunction gfar_alloc_rx_queuesfunction gfar_free_tx_queuesfunction gfar_free_rx_queuesfunction unmap_group_regsfunction free_gfar_devfunction disable_napifunction enable_napifunction gfar_parse_groupfunction for_each_set_bitfunction gfar_get_interfacefunction gfar_of_initfunction for_each_available_child_of_nodefunction cluster_entry_per_classfunction gfar_init_filer_tablefunction __gfar_detect_errata_83xxfunction __gfar_detect_errata_85xxfunction gfar_detect_erratafunction gfar_init_addr_hash_tablefunction __gfar_is_rx_idlefunction gfar_halt_nodisablefunction gfar_haltfunction free_skb_tx_queuefunction free_skb_rx_queuefunction free_skb_resourcesfunction stop_gfarfunction gfar_startfunction gfar_new_pagefunction gfar_rx_alloc_errfunction gfar_alloc_rx_buffsfunction gfar_init_bdsfunction gfar_alloc_skb_resources
Annotated Snippet
static const struct net_device_ops gfar_netdev_ops = {
.ndo_open = gfar_enet_open,
.ndo_start_xmit = gfar_start_xmit,
.ndo_stop = gfar_close,
.ndo_change_mtu = gfar_change_mtu,
.ndo_set_features = gfar_set_features,
.ndo_set_rx_mode = gfar_set_multi,
.ndo_tx_timeout = gfar_timeout,
.ndo_eth_ioctl = phy_do_ioctl_running,
.ndo_get_stats64 = gfar_get_stats64,
.ndo_change_carrier = fixed_phy_change_carrier,
.ndo_set_mac_address = gfar_set_mac_addr,
.ndo_validate_addr = eth_validate_addr,
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = gfar_netpoll,
#endif
.ndo_hwtstamp_get = gfar_hwtstamp_get,
.ndo_hwtstamp_set = gfar_hwtstamp_set,
};
/* Set up the ethernet device structure, private data,
* and anything else we need before we start
*/
static int gfar_probe(struct platform_device *ofdev)
{
struct device_node *np = ofdev->dev.of_node;
struct net_device *dev = NULL;
struct gfar_private *priv = NULL;
int err = 0, i;
err = gfar_of_init(ofdev, &dev);
if (err)
return err;
priv = netdev_priv(dev);
priv->ndev = dev;
priv->ofdev = ofdev;
priv->dev = &ofdev->dev;
SET_NETDEV_DEV(dev, &ofdev->dev);
INIT_WORK(&priv->reset_task, gfar_reset_task);
platform_set_drvdata(ofdev, priv);
gfar_detect_errata(priv);
/* Set the dev->base_addr to the gfar reg region */
dev->base_addr = (unsigned long) priv->gfargrp[0].regs;
/* Fill in the dev structure */
dev->watchdog_timeo = TX_TIMEOUT;
/* MTU range: 50 - 9586 */
dev->mtu = 1500;
dev->min_mtu = 50;
dev->max_mtu = GFAR_JUMBO_FRAME_SIZE - ETH_HLEN;
dev->netdev_ops = &gfar_netdev_ops;
dev->ethtool_ops = &gfar_ethtool_ops;
/* Register for napi ...We are registering NAPI for each grp */
for (i = 0; i < priv->num_grps; i++) {
netif_napi_add(dev, &priv->gfargrp[i].napi_rx,
gfar_poll_rx_sq);
netif_napi_add_tx_weight(dev, &priv->gfargrp[i].napi_tx,
gfar_poll_tx_sq, 2);
}
if (priv->device_flags & FSL_GIANFAR_DEV_HAS_CSUM) {
dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_SG |
NETIF_F_RXCSUM;
dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG |
NETIF_F_RXCSUM | NETIF_F_HIGHDMA;
}
if (priv->device_flags & FSL_GIANFAR_DEV_HAS_VLAN) {
dev->hw_features |= NETIF_F_HW_VLAN_CTAG_TX |
NETIF_F_HW_VLAN_CTAG_RX;
dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
}
dev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
gfar_init_addr_hash_table(priv);
/* Insert receive time stamps into padding alignment bytes, and
* plus 2 bytes padding to ensure the cpu alignment.
*/
if (priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
priv->padding = 8 + DEFAULT_PADDING;
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/platform_device.h`, `linux/string.h`, `linux/errno.h`, `linux/unistd.h`, `linux/slab.h`, `linux/interrupt.h`, `linux/delay.h`.
- Detected declarations: `function gfar_init_rxbdp`, `function gfar_init_tx_rx_base`, `function gfar_init_rqprm`, `function gfar_rx_offload_en`, `function gfar_mac_rx_config`, `function gfar_mac_tx_config`, `function gfar_configure_coalescing`, `function for_each_set_bit`, `function for_each_set_bit`, `function gfar_configure_coalescing_all`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.