drivers/net/ethernet/google/gve/gve_main.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/google/gve/gve_main.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/google/gve/gve_main.c- Extension
.c- Size
- 79197 bytes
- Lines
- 3032
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitmap.hlinux/bpf.hlinux/cpumask.hlinux/etherdevice.hlinux/filter.hlinux/interrupt.hlinux/irq.hlinux/math64.hlinux/module.hlinux/pci.hlinux/sched.hlinux/timer.hlinux/workqueue.hlinux/utsname.hlinux/version.hnet/netdev_queues.hnet/sch_generic.hnet/xdp_sock_drv.hgve.hgve_dqo.hgve_adminq.hgve_register.hgve_utils.h
Detected Declarations
function gve_verify_driver_compatibilityfunction gve_features_checkfunction gve_start_xmitfunction gve_get_statsfunction gve_alloc_flow_rule_cachesfunction gve_free_flow_rule_cachesfunction gve_alloc_rss_config_cachefunction gve_free_rss_config_cachefunction gve_alloc_counter_arrayfunction gve_free_counter_arrayfunction gve_stats_report_taskfunction gve_stats_report_schedulefunction gve_stats_report_timerfunction gve_alloc_stats_reportfunction gve_free_stats_reportfunction gve_mgmnt_intrfunction gve_intrfunction gve_intr_dqofunction gve_is_napi_on_home_cpufunction gve_napi_pollfunction gve_napi_poll_dqofunction gve_alloc_notify_blocksfunction gve_free_notify_blocksfunction gve_setup_device_resourcesfunction gve_teardown_device_resourcesfunction gve_unregister_qplfunction gve_register_qplfunction gve_register_qplsfunction gve_unregister_qplsfunction gve_create_ringsfunction init_xdp_sync_statsfunction gve_init_sync_statsfunction gve_tx_get_curr_alloc_cfgfunction gve_tx_stop_ringsfunction gve_tx_start_ringsfunction gve_update_num_qpl_pagesfunction gve_queues_mem_allocfunction gve_destroy_ringsfunction gve_queues_mem_freefunction gve_alloc_pagefunction gve_free_pagefunction gve_free_queue_page_listfunction gve_schedule_resetfunction gve_unreg_xsk_poolfunction gve_reg_xsk_poolfunction gve_unreg_xdp_infofunction gve_reg_xdp_infofunction gve_drain_page_cache
Annotated Snippet
static const struct net_device_ops gve_netdev_ops = {
.ndo_start_xmit = gve_start_xmit,
.ndo_features_check = gve_features_check,
.ndo_open = gve_open,
.ndo_stop = gve_close,
.ndo_get_stats64 = gve_get_stats,
.ndo_tx_timeout = gve_tx_timeout,
.ndo_set_features = gve_set_features,
.ndo_bpf = gve_xdp,
.ndo_xdp_xmit = gve_xdp_xmit,
.ndo_xsk_wakeup = gve_xsk_wakeup,
.ndo_hwtstamp_get = gve_get_ts_config,
.ndo_hwtstamp_set = gve_set_ts_config,
};
static void gve_handle_status(struct gve_priv *priv, u32 status)
{
if (GVE_DEVICE_STATUS_RESET_MASK & status) {
dev_info(&priv->pdev->dev, "Device requested reset.\n");
gve_set_do_reset(priv);
}
if (GVE_DEVICE_STATUS_REPORT_STATS_MASK & status) {
priv->stats_report_trigger_cnt++;
gve_set_do_report_stats(priv);
}
}
static void gve_handle_reset(struct gve_priv *priv)
{
/* A service task will be scheduled at the end of probe to catch any
* resets that need to happen, and we don't want to reset until
* probe is done.
*/
if (gve_get_probe_in_progress(priv))
return;
if (gve_get_do_reset(priv)) {
rtnl_lock();
netdev_lock(priv->dev);
gve_reset(priv, false);
netdev_unlock(priv->dev);
rtnl_unlock();
}
}
void gve_handle_report_stats(struct gve_priv *priv)
{
struct stats *stats = priv->stats_report->stats;
int idx, stats_idx = 0;
unsigned int start = 0;
u64 tx_bytes;
if (!gve_get_report_stats(priv))
return;
be64_add_cpu(&priv->stats_report->written_count, 1);
/* tx stats */
if (priv->tx) {
for (idx = 0; idx < gve_num_tx_queues(priv); idx++) {
u32 last_completion = 0;
u32 tx_frames = 0;
/* DQO doesn't currently support these metrics. */
if (gve_is_gqi(priv)) {
last_completion = priv->tx[idx].done;
tx_frames = priv->tx[idx].req;
}
do {
start = u64_stats_fetch_begin(&priv->tx[idx].statss);
tx_bytes = priv->tx[idx].bytes_done;
} while (u64_stats_fetch_retry(&priv->tx[idx].statss, start));
stats[stats_idx++] = (struct stats) {
.stat_name = cpu_to_be32(TX_WAKE_CNT),
.value = cpu_to_be64(priv->tx[idx].wake_queue),
.queue_id = cpu_to_be32(idx),
};
stats[stats_idx++] = (struct stats) {
.stat_name = cpu_to_be32(TX_STOP_CNT),
.value = cpu_to_be64(priv->tx[idx].stop_queue),
.queue_id = cpu_to_be32(idx),
};
stats[stats_idx++] = (struct stats) {
.stat_name = cpu_to_be32(TX_FRAMES_SENT),
.value = cpu_to_be64(tx_frames),
.queue_id = cpu_to_be32(idx),
};
stats[stats_idx++] = (struct stats) {
.stat_name = cpu_to_be32(TX_BYTES_SENT),
.value = cpu_to_be64(tx_bytes),
Annotation
- Immediate include surface: `linux/bitmap.h`, `linux/bpf.h`, `linux/cpumask.h`, `linux/etherdevice.h`, `linux/filter.h`, `linux/interrupt.h`, `linux/irq.h`, `linux/math64.h`.
- Detected declarations: `function gve_verify_driver_compatibility`, `function gve_features_check`, `function gve_start_xmit`, `function gve_get_stats`, `function gve_alloc_flow_rule_caches`, `function gve_free_flow_rule_caches`, `function gve_alloc_rss_config_cache`, `function gve_free_rss_config_cache`, `function gve_alloc_counter_array`, `function gve_free_counter_array`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.