drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h- Extension
.h- Size
- 14534 bytes
- Lines
- 303
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct hbg_tx_descstruct hbg_rx_descenum hbg_port_modeenum hbg_l3_err_codeenum hbg_l4_err_codeenum hbg_pkt_type_code
Annotated Snippet
struct hbg_tx_desc {
u32 word0;
u32 word1;
u32 word2; /* pkt_addr */
u32 word3; /* clear_addr */
};
#define HBG_TX_DESC_W0_IP_OFF_M GENMASK(30, 26)
#define HBG_TX_DESC_W0_l3_CS_B BIT(2)
#define HBG_TX_DESC_W0_WB_B BIT(1)
#define HBG_TX_DESC_W0_l4_CS_B BIT(0)
#define HBG_TX_DESC_W1_SEND_LEN_M GENMASK(19, 4)
struct hbg_rx_desc {
u32 word0;
u32 word1; /* tag */
u32 word2;
u32 word3;
u32 word4;
u32 word5;
};
#define HBG_RX_DESC_W2_PKT_LEN_M GENMASK(31, 16)
#define HBG_RX_DESC_W2_PORT_NUM_M GENMASK(15, 12)
#define HBG_RX_DESC_W3_IP_OFFSET_M GENMASK(23, 16)
#define HBG_RX_DESC_W3_VLAN_M GENMASK(15, 0)
#define HBG_RX_DESC_W4_IP_TCP_UDP_M GENMASK(31, 30)
#define HBG_RX_DESC_W4_IPSEC_B BIT(29)
#define HBG_RX_DESC_W4_IP_VERSION_B BIT(28)
#define HBG_RX_DESC_W4_L4_ERR_CODE_M GENMASK(26, 23)
#define HBG_RX_DESC_W4_FRAG_B BIT(22)
#define HBG_RX_DESC_W4_OPT_B BIT(21)
#define HBG_RX_DESC_W4_IP_VERSION_ERR_B BIT(20)
#define HBG_RX_DESC_W4_BRD_CST_B BIT(19)
#define HBG_RX_DESC_W4_MUL_CST_B BIT(18)
#define HBG_RX_DESC_W4_ARP_B BIT(17)
#define HBG_RX_DESC_W4_RARP_B BIT(16)
#define HBG_RX_DESC_W4_ICMP_B BIT(15)
#define HBG_RX_DESC_W4_VLAN_FLAG_B BIT(14)
#define HBG_RX_DESC_W4_DROP_B BIT(13)
#define HBG_RX_DESC_W4_L3_ERR_CODE_M GENMASK(12, 9)
#define HBG_RX_DESC_W4_L2_ERR_B BIT(8)
#define HBG_RX_DESC_W4_IDX_MATCH_B BIT(7)
#define HBG_RX_DESC_W4_PARSE_MODE_M GENMASK(6, 5)
#define HBG_RX_DESC_W5_VALID_SIZE_M GENMASK(15, 0)
enum hbg_l3_err_code {
HBG_L3_OK = 0,
HBG_L3_WRONG_HEAD,
HBG_L3_CSUM_ERR,
HBG_L3_LEN_ERR,
HBG_L3_ZERO_TTL,
HBG_L3_RSVD,
};
enum hbg_l4_err_code {
HBG_L4_OK = 0,
HBG_L4_WRONG_HEAD,
HBG_L4_LEN_ERR,
HBG_L4_CSUM_ERR,
HBG_L4_ZERO_PORT_NUM,
HBG_L4_RSVD,
};
enum hbg_pkt_type_code {
HBG_NO_IP_PKT = 0,
HBG_IP_PKT,
HBG_TCP_PKT,
HBG_UDP_PKT,
};
#endif
Annotation
- Detected declarations: `struct hbg_tx_desc`, `struct hbg_rx_desc`, `enum hbg_port_mode`, `enum hbg_l3_err_code`, `enum hbg_l4_err_code`, `enum hbg_pkt_type_code`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.