drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.h- Extension
.h- Size
- 745 bytes
- Lines
- 42
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
hns_dsaf_mac.h
Detected Declarations
struct hns_gmac_port_mode_cfgenum hns_port_modeenum hns_gmac_duplex_mdoe
Annotated Snippet
struct hns_gmac_port_mode_cfg {
enum hns_port_mode port_mode;
u32 max_frm_size;
u32 short_runts_thr;
u32 pad_enable;
u32 crc_add;
u32 an_enable; /*auto-nego enable */
u32 runt_pkt_en;
u32 strip_pad_en;
};
#define ETH_GMAC_DUMP_NUM 96
#endif /* __HNS_GMAC_H__ */
Annotation
- Immediate include surface: `hns_dsaf_mac.h`.
- Detected declarations: `struct hns_gmac_port_mode_cfg`, `enum hns_port_mode`, `enum hns_gmac_duplex_mdoe`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.