drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

File Facts

System: Linux kernel
Corpus path: drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
Extension: .h
Size: 40715 bytes
Lines: 1096
Domain: Driver Families
Bucket: drivers/net
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

linux/regmap.h

Detected Declarations

function Copyright
function dsaf_read_reg
function dsaf_write_syscon
function dsaf_read_syscon
function dsaf_set_reg_field
function dsaf_get_reg_field

Annotated Snippet

#ifndef _DSAF_REG_H_
#define _DSAF_REG_H_

#include <linux/regmap.h>
#define HNS_DEBUG_RING_IRQ_IDX		0
#define HNS_SERVICE_RING_IRQ_IDX	59
#define HNSV2_SERVICE_RING_IRQ_IDX	25

#define DSAF_MAX_PORT_NUM	6
#define DSAF_MAX_VM_NUM		128

#define DSAF_COMM_DEV_NUM	1
#define DSAF_PPE_INODE_BASE	6
#define DSAF_DEBUG_NW_NUM	2
#define DSAF_SERVICE_NW_NUM	6
#define DSAF_COMM_CHN		DSAF_SERVICE_NW_NUM
#define DSAF_GE_NUM		((DSAF_SERVICE_NW_NUM) + (DSAF_DEBUG_NW_NUM))
#define DSAF_XGE_NUM		DSAF_SERVICE_NW_NUM
#define DSAF_PORT_TYPE_NUM 3
#define DSAF_NODE_NUM		18
#define DSAF_XOD_BIG_NUM	DSAF_NODE_NUM
#define DSAF_SBM_NUM		DSAF_NODE_NUM
#define DSAFV2_SBM_NUM		8
#define DSAFV2_SBM_XGE_CHN    6
#define DSAFV2_SBM_PPE_CHN    1
#define DASFV2_ROCEE_CRD_NUM  1

#define DSAF_VOQ_NUM		DSAF_NODE_NUM
#define DSAF_INODE_NUM		DSAF_NODE_NUM
#define DSAF_XOD_NUM		8
#define DSAF_TBL_NUM		8
#define DSAF_SW_PORT_NUM	8
#define DSAF_TOTAL_QUEUE_NUM	129

/* reserved a tcam entry for each port to support promisc by fuzzy match */
#define DSAFV2_MAC_FUZZY_TCAM_NUM    DSAF_MAX_PORT_NUM

#define DSAF_TCAM_SUM		512
#define DSAF_LINE_SUM		(2048 * 14)

#define DSAF_SUB_SC_NT_SRAM_CLK_SEL_REG			0x100
#define DSAF_SUB_SC_HILINK3_CRG_CTRL0_REG		0x180
#define DSAF_SUB_SC_HILINK3_CRG_CTRL1_REG		0x184
#define DSAF_SUB_SC_HILINK3_CRG_CTRL2_REG		0x188
#define DSAF_SUB_SC_HILINK3_CRG_CTRL3_REG		0x18C
#define DSAF_SUB_SC_HILINK4_CRG_CTRL0_REG		0x190
#define DSAF_SUB_SC_HILINK4_CRG_CTRL1_REG		0x194
#define DSAF_SUB_SC_DSAF_CLK_EN_REG			0x300
#define DSAF_SUB_SC_DSAF_CLK_DIS_REG			0x304
#define DSAF_SUB_SC_NT_CLK_EN_REG			0x308
#define DSAF_SUB_SC_NT_CLK_DIS_REG			0x30C
#define DSAF_SUB_SC_XGE_CLK_EN_REG			0x310
#define DSAF_SUB_SC_XGE_CLK_DIS_REG			0x314
#define DSAF_SUB_SC_GE_CLK_EN_REG			0x318
#define DSAF_SUB_SC_GE_CLK_DIS_REG			0x31C
#define DSAF_SUB_SC_PPE_CLK_EN_REG			0x320
#define DSAF_SUB_SC_PPE_CLK_DIS_REG			0x324
#define DSAF_SUB_SC_RCB_PPE_COM_CLK_EN_REG		0x350
#define DSAF_SUB_SC_RCB_PPE_COM_CLK_DIS_REG		0x354
#define DSAF_SUB_SC_XBAR_RESET_REQ_REG			0xA00
#define DSAF_SUB_SC_XBAR_RESET_DREQ_REG			0xA04
#define DSAF_SUB_SC_NT_RESET_REQ_REG			0xA08
#define DSAF_SUB_SC_NT_RESET_DREQ_REG			0xA0C
#define DSAF_SUB_SC_XGE_RESET_REQ_REG			0xA10
#define DSAF_SUB_SC_XGE_RESET_DREQ_REG			0xA14
#define DSAF_SUB_SC_GE_RESET_REQ0_REG			0xA18
#define DSAF_SUB_SC_GE_RESET_DREQ0_REG			0xA1C
#define DSAF_SUB_SC_GE_RESET_REQ1_REG			0xA20
#define DSAF_SUB_SC_GE_RESET_DREQ1_REG			0xA24
#define DSAF_SUB_SC_PPE_RESET_REQ_REG			0xA48
#define DSAF_SUB_SC_PPE_RESET_DREQ_REG			0xA4C
#define DSAF_SUB_SC_RCB_PPE_COM_RESET_REQ_REG		0xA88
#define DSAF_SUB_SC_RCB_PPE_COM_RESET_DREQ_REG		0xA8C
#define DSAF_SUB_SC_DSAF_RESET_REQ_REG			0xAA8
#define DSAF_SUB_SC_DSAF_RESET_DREQ_REG			0xAAC
#define DSAF_SUB_SC_ROCEE_RESET_REQ_REG			0xA50
#define DSAF_SUB_SC_ROCEE_RESET_DREQ_REG		0xA54
#define DSAF_SUB_SC_ROCEE_CLK_DIS_REG			0x32C
#define DSAF_SUB_SC_ROCEE_CLK_EN_REG			0x328
#define DSAF_SUB_SC_LIGHT_MODULE_DETECT_EN_REG		0x2060
#define DSAF_SUB_SC_TCAM_MBIST_EN_REG			0x2300
#define DSAF_SUB_SC_DSAF_CLK_ST_REG			0x5300
#define DSAF_SUB_SC_NT_CLK_ST_REG			0x5304
#define DSAF_SUB_SC_XGE_CLK_ST_REG			0x5308
#define DSAF_SUB_SC_GE_CLK_ST_REG			0x530C
#define DSAF_SUB_SC_PPE_CLK_ST_REG			0x5310
#define DSAF_SUB_SC_ROCEE_CLK_ST_REG			0x5314
#define DSAF_SUB_SC_CPU_CLK_ST_REG			0x5318
#define DSAF_SUB_SC_RCB_PPE_COM_CLK_ST_REG		0x5328
#define DSAF_SUB_SC_XBAR_RESET_ST_REG			0x5A00

Annotation

Immediate include surface: `linux/regmap.h`.
Detected declarations: `function Copyright`, `function dsaf_read_reg`, `function dsaf_write_syscon`, `function dsaf_read_syscon`, `function dsaf_set_reg_field`, `function dsaf_get_reg_field`.
Atlas domain: Driver Families / drivers/net.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.