drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h- Extension
.h- Size
- 15044 bytes
- Lines
- 501
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hhnae3.h
Detected Declarations
struct hclge_comm_caps_bit_mapstruct hclge_cmdq_tx_timeout_mapstruct hclge_comm_firmware_compat_cmdstruct hclge_comm_errcodestruct hclge_comm_query_version_cmdstruct hclge_comm_query_scc_cmdstruct hclge_descstruct hclge_comm_cmq_ringstruct hclge_comm_hwstruct hclge_comm_cmq_opsstruct hclge_comm_cmqstruct hclge_comm_hwenum hclge_opcode_typeenum hclge_comm_cmd_return_statusenum HCLGE_COMM_CAP_BITSenum HCLGE_COMM_API_CAP_BITSenum hclge_comm_cmd_stateenum hclge_comm_cmd_statusfunction hclge_comm_write_regfunction hclge_comm_read_reg
Annotated Snippet
struct hclge_comm_caps_bit_map {
u16 imp_bit;
u16 local_bit;
};
struct hclge_cmdq_tx_timeout_map {
u32 opcode;
u32 tx_timeout;
};
struct hclge_comm_firmware_compat_cmd {
__le32 compat;
u8 rsv[20];
};
enum hclge_comm_cmd_state {
HCLGE_COMM_STATE_CMD_DISABLE,
};
struct hclge_comm_errcode {
u32 imp_errcode;
int common_errno;
};
#define HCLGE_COMM_QUERY_CAP_LENGTH 3
struct hclge_comm_query_version_cmd {
__le32 firmware;
__le32 hardware;
__le32 api_caps;
__le32 caps[HCLGE_COMM_QUERY_CAP_LENGTH]; /* capabilities of device */
};
struct hclge_comm_query_scc_cmd {
__le32 scc_version;
u8 rsv[20];
};
#define HCLGE_DESC_DATA_LEN 6
struct hclge_desc {
__le16 opcode;
__le16 flag;
__le16 retval;
__le16 rsv;
__le32 data[HCLGE_DESC_DATA_LEN];
};
struct hclge_comm_cmq_ring {
dma_addr_t desc_dma_addr;
struct hclge_desc *desc;
struct pci_dev *pdev;
u32 head;
u32 tail;
u16 buf_size;
u16 desc_num;
int next_to_use;
int next_to_clean;
u8 ring_type; /* cmq ring type */
spinlock_t lock; /* Command queue lock */
};
enum hclge_comm_cmd_status {
HCLGE_COMM_STATUS_SUCCESS = 0,
HCLGE_COMM_ERR_CSQ_FULL = -1,
HCLGE_COMM_ERR_CSQ_TIMEOUT = -2,
HCLGE_COMM_ERR_CSQ_ERROR = -3,
};
struct hclge_comm_hw;
struct hclge_comm_cmq_ops {
void (*trace_cmd_send)(struct hclge_comm_hw *hw,
struct hclge_desc *desc,
int num, bool is_special);
void (*trace_cmd_get)(struct hclge_comm_hw *hw,
struct hclge_desc *desc,
int num, bool is_special);
};
struct hclge_comm_cmq {
struct hclge_comm_cmq_ring csq;
struct hclge_comm_cmq_ring crq;
u16 tx_timeout;
enum hclge_comm_cmd_status last_status;
struct hclge_comm_cmq_ops ops;
};
struct hclge_comm_hw {
void __iomem *io_base;
void __iomem *mem_base;
struct hclge_comm_cmq cmq;
Annotation
- Immediate include surface: `linux/types.h`, `hnae3.h`.
- Detected declarations: `struct hclge_comm_caps_bit_map`, `struct hclge_cmdq_tx_timeout_map`, `struct hclge_comm_firmware_compat_cmd`, `struct hclge_comm_errcode`, `struct hclge_comm_query_version_cmd`, `struct hclge_comm_query_scc_cmd`, `struct hclge_desc`, `struct hclge_comm_cmq_ring`, `struct hclge_comm_hw`, `struct hclge_comm_cmq_ops`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.