drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c- Extension
.c- Size
- 164660 bytes
- Lines
- 6098
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/dma-mapping.hlinux/etherdevice.hlinux/interrupt.hlinux/cpu_rmap.hlinux/if_vlan.hlinux/irq.hlinux/ip.hlinux/ipv6.hlinux/iommu.hlinux/module.hlinux/pci.hlinux/skbuff.hlinux/sctp.hnet/gre.hnet/gro.hnet/ip6_checksum.hnet/page_pool/helpers.hnet/pkt_cls.hnet/pkt_sched.hnet/tcp.hnet/vxlan.hnet/geneve.hnet/netdev_queues.hhnae3.hhns3_enet.hhns3_trace.h
Detected Declarations
struct hns3_desc_paramfunction ARRAY_SIZEfunction hns3_nic_uninit_irqfunction hns3_nic_init_irqfunction hns3_mask_vector_irqfunction hns3_irq_enablefunction hns3_irq_disablefunction hns3_set_vector_coalesce_rlfunction hns3_set_vector_coalesce_rx_glfunction hns3_set_vector_coalesce_tx_glfunction hns3_set_vector_coalesce_tx_qlfunction hns3_set_vector_coalesce_rx_qlfunction hns3_vector_coalesce_initfunction hns3_vector_coalesce_init_hwfunction hns3_nic_set_real_num_queuefunction hns3_get_max_available_channelsfunction hns3_tqp_enablefunction hns3_tqp_disablefunction hns3_free_rx_cpu_rmapfunction hns3_set_rx_cpu_rmapfunction hns3_enable_irqs_and_tqpsfunction hns3_disable_irqs_and_tqpsfunction hns3_nic_net_upfunction hns3_config_xpsfunction hns3_nic_net_openfunction hns3_reset_tx_queuefunction hns3_nic_net_downfunction hns3_nic_net_stopfunction hns3_nic_uc_syncfunction hns3_nic_uc_unsyncfunction hns3_nic_mc_syncfunction hns3_nic_mc_unsyncfunction hns3_get_netdev_flagsfunction hns3_nic_set_rx_modefunction hns3_request_update_promisc_modefunction hns3_tx_spare_spacefunction hns3_tx_spare_updatefunction hns3_can_use_tx_bouncefunction hns3_can_use_tx_sglfunction hns3_init_tx_spare_bufferfunction hns3_tx_spare_rollbackfunction hns3_tx_spare_reclaim_cbfunction hns3_tx_spare_updatefunction hns3_set_tsofunction hns3_get_l4_protocolfunction hns3_tunnel_csum_bugfunction hns3_set_outer_l2l3l4function hns3_set_l3_type
Annotated Snippet
static const struct net_device_ops hns3_nic_netdev_ops = {
.ndo_open = hns3_nic_net_open,
.ndo_stop = hns3_nic_net_stop,
.ndo_start_xmit = hns3_nic_net_xmit,
.ndo_tx_timeout = hns3_nic_net_timeout,
.ndo_set_mac_address = hns3_nic_net_set_mac_address,
.ndo_eth_ioctl = hns3_nic_do_ioctl,
.ndo_change_mtu = hns3_nic_change_mtu,
.ndo_set_features = hns3_nic_set_features,
.ndo_features_check = hns3_features_check,
.ndo_get_stats64 = hns3_nic_get_stats64,
.ndo_setup_tc = hns3_nic_setup_tc,
.ndo_set_rx_mode = hns3_nic_set_rx_mode,
.ndo_vlan_rx_add_vid = hns3_vlan_rx_add_vid,
.ndo_vlan_rx_kill_vid = hns3_vlan_rx_kill_vid,
.ndo_set_vf_vlan = hns3_ndo_set_vf_vlan,
.ndo_set_vf_spoofchk = hns3_set_vf_spoofchk,
.ndo_set_vf_trust = hns3_set_vf_trust,
#ifdef CONFIG_RFS_ACCEL
.ndo_rx_flow_steer = hns3_rx_flow_steer,
#endif
.ndo_get_vf_config = hns3_nic_get_vf_config,
.ndo_set_vf_link_state = hns3_nic_set_vf_link_state,
.ndo_set_vf_rate = hns3_nic_set_vf_rate,
.ndo_set_vf_mac = hns3_nic_set_vf_mac,
.ndo_select_queue = hns3_nic_select_queue,
.ndo_hwtstamp_get = hns3_nic_hwtstamp_get,
.ndo_hwtstamp_set = hns3_nic_hwtstamp_set,
};
bool hns3_is_phys_func(struct pci_dev *pdev)
{
u32 dev_id = pdev->device;
switch (dev_id) {
case HNAE3_DEV_ID_GE:
case HNAE3_DEV_ID_25GE:
case HNAE3_DEV_ID_25GE_RDMA:
case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
case HNAE3_DEV_ID_50GE_RDMA:
case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
case HNAE3_DEV_ID_100G_RDMA_MACSEC:
case HNAE3_DEV_ID_200G_RDMA:
return true;
case HNAE3_DEV_ID_VF:
case HNAE3_DEV_ID_RDMA_DCB_PFC_VF:
return false;
default:
dev_warn(&pdev->dev, "un-recognized pci device-id %u",
dev_id);
}
return false;
}
static void hns3_disable_sriov(struct pci_dev *pdev)
{
/* If our VFs are assigned we cannot shut down SR-IOV
* without causing issues, so just leave the hardware
* available but disabled
*/
if (pci_vfs_assigned(pdev)) {
dev_warn(&pdev->dev,
"disabling driver while VFs are assigned\n");
return;
}
pci_disable_sriov(pdev);
}
/* hns3_probe - Device initialization routine
* @pdev: PCI device information struct
* @ent: entry in hns3_pci_tbl
*
* hns3_probe initializes a PF identified by a pci_dev structure.
* The OS initialization, configuring of the PF private structure,
* and a hardware reset occur.
*
* Returns 0 on success, negative on failure
*/
static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
struct hnae3_ae_dev *ae_dev;
int ret;
ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev), GFP_KERNEL);
if (!ae_dev)
return -ENOMEM;
ae_dev->pdev = pdev;
Annotation
- Immediate include surface: `linux/dma-mapping.h`, `linux/etherdevice.h`, `linux/interrupt.h`, `linux/cpu_rmap.h`, `linux/if_vlan.h`, `linux/irq.h`, `linux/ip.h`, `linux/ipv6.h`.
- Detected declarations: `struct hns3_desc_param`, `function ARRAY_SIZE`, `function hns3_nic_uninit_irq`, `function hns3_nic_init_irq`, `function hns3_mask_vector_irq`, `function hns3_irq_enable`, `function hns3_irq_disable`, `function hns3_set_vector_coalesce_rl`, `function hns3_set_vector_coalesce_rx_gl`, `function hns3_set_vector_coalesce_tx_gl`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.