drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c- Extension
.c- Size
- 53678 bytes
- Lines
- 2162
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/etherdevice.hhclge_cmd.hhclge_main.hhclge_tm.h
Detected Declarations
enum hclge_shaper_levelfunction IRfunction hclge_pfc_stats_getfunction hclge_pfc_rx_stats_getfunction hclge_pfc_tx_stats_getfunction hclge_mac_pause_en_cfgfunction hclge_pfc_pause_en_cfgfunction hclge_pause_param_cfgfunction hclge_pause_addr_cfgfunction hclge_fill_pri_arrayfunction hclge_up_to_tc_mapfunction hclge_dscp_to_prio_map_initfunction hclge_dscp_to_tc_mapfunction hclge_tm_pg_to_pri_map_cfgfunction hclge_tm_qs_to_pri_map_cfgfunction hclge_tm_q_to_qs_map_cfgfunction hclge_tm_pg_weight_cfgfunction hclge_tm_pri_weight_cfgfunction hclge_tm_qs_weight_cfgfunction hclge_tm_get_shapping_parafunction hclge_tm_pg_shapping_cfgfunction hclge_tm_port_shaper_cfgfunction hclge_tm_pri_shapping_cfgfunction hclge_tm_pg_schd_mode_cfgfunction hclge_tm_pri_schd_mode_cfgfunction hclge_tm_qs_schd_mode_cfgfunction hclge_tm_qs_bp_cfgfunction hclge_tm_qs_shaper_cfgfunction hclge_vport_get_max_rss_sizefunction hclge_vport_get_tqp_numfunction hclge_tm_update_kinfo_rss_sizefunction hclge_tm_vport_tc_info_updatefunction hclge_tm_vport_info_updatefunction hclge_tm_tc_info_initfunction hclge_tm_pg_info_initfunction hclge_update_fc_mode_by_dcb_flagfunction hclge_update_fc_modefunction hclge_tm_pfc_info_updatefunction hclge_tm_schd_info_initfunction hclge_tm_pg_to_pri_mapfunction hclge_tm_pg_shaper_cfgfunction hclge_tm_pg_dwrr_cfgfunction hclge_vport_q_to_qs_mapfunction hclge_tm_pri_q_qs_cfg_tc_basefunction hclge_tm_pri_q_qs_cfg_vnet_basefunction hclge_tm_pri_q_qs_cfgfunction hclge_tm_pri_tc_base_shaper_cfgfunction hclge_tm_pri_vnet_base_shaper_pri_cfg
Annotated Snippet
while (ir_calc >= ir && ir) {
ir_s_calc++;
ir_calc = DEFAULT_DIVISOR_IR_B /
(tick * (1 << ir_s_calc));
}
ir_para->ir_b = (ir * tick * (1 << ir_s_calc) +
(DIVISOR_CLK >> 1)) / DIVISOR_CLK;
} else {
/* Increasing the numerator to select ir_u value */
u32 numerator;
while (ir_calc < ir) {
ir_u_calc++;
numerator = DEFAULT_DIVISOR_IR_B * (1 << ir_u_calc);
ir_calc = (numerator + (tick >> 1)) / tick;
}
if (ir_calc == ir) {
ir_para->ir_b = DEFAULT_SHAPER_IR_B;
} else {
u32 denominator = DIVISOR_CLK * (1 << --ir_u_calc);
ir_para->ir_b = (ir * tick + (denominator >> 1)) /
denominator;
}
}
ir_para->ir_u = ir_u_calc;
ir_para->ir_s = ir_s_calc;
return 0;
}
static const u16 hclge_pfc_tx_stats_offset[] = {
HCLGE_MAC_STATS_FIELD_OFF(mac_tx_pfc_pri0_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_tx_pfc_pri1_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_tx_pfc_pri2_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_tx_pfc_pri3_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_tx_pfc_pri4_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_tx_pfc_pri5_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_tx_pfc_pri6_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_tx_pfc_pri7_pkt_num)
};
static const u16 hclge_pfc_rx_stats_offset[] = {
HCLGE_MAC_STATS_FIELD_OFF(mac_rx_pfc_pri0_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_rx_pfc_pri1_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_rx_pfc_pri2_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_rx_pfc_pri3_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_rx_pfc_pri4_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_rx_pfc_pri5_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_rx_pfc_pri6_pkt_num),
HCLGE_MAC_STATS_FIELD_OFF(mac_rx_pfc_pri7_pkt_num)
};
static void hclge_pfc_stats_get(struct hclge_dev *hdev, bool tx, u64 *stats)
{
const u16 *offset;
int i;
if (tx)
offset = hclge_pfc_tx_stats_offset;
else
offset = hclge_pfc_rx_stats_offset;
for (i = 0; i < HCLGE_MAX_TC_NUM; i++)
stats[i] = HCLGE_STATS_READ(&hdev->mac_stats, offset[i]);
}
void hclge_pfc_rx_stats_get(struct hclge_dev *hdev, u64 *stats)
{
hclge_pfc_stats_get(hdev, false, stats);
}
void hclge_pfc_tx_stats_get(struct hclge_dev *hdev, u64 *stats)
{
hclge_pfc_stats_get(hdev, true, stats);
}
int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx)
{
struct hclge_desc desc;
hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CFG_MAC_PAUSE_EN, false);
desc.data[0] = cpu_to_le32((tx ? HCLGE_TX_MAC_PAUSE_EN_MSK : 0) |
(rx ? HCLGE_RX_MAC_PAUSE_EN_MSK : 0));
return hclge_cmd_send(&hdev->hw, &desc, 1);
}
Annotation
- Immediate include surface: `linux/etherdevice.h`, `hclge_cmd.h`, `hclge_main.h`, `hclge_tm.h`.
- Detected declarations: `enum hclge_shaper_level`, `function IR`, `function hclge_pfc_stats_get`, `function hclge_pfc_rx_stats_get`, `function hclge_pfc_tx_stats_get`, `function hclge_mac_pause_en_cfg`, `function hclge_pfc_pause_en_cfg`, `function hclge_pause_param_cfg`, `function hclge_pause_addr_cfg`, `function hclge_fill_pri_array`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.