drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h- Extension
.h- Size
- 8664 bytes
- Lines
- 301
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/fs.hlinux/if_vlan.hlinux/types.hnet/devlink.hhclge_mbx.hhclgevf_cmd.hhnae3.hhclge_comm_rss.hhclge_comm_tqp_stats.h
Detected Declarations
struct hclgevf_macstruct hclgevf_hwstruct hclgevf_cfgstruct hclgevf_misc_vectorstruct hclgevf_rst_statsstruct hclgevf_mac_addr_nodestruct hclgevf_mac_table_cfgstruct hclgevf_devenum hclgevf_evt_causeenum hclgevf_statesenum HCLGEVF_MAC_ADDR_TYPEenum HCLGEVF_MAC_NODE_STATEfunction hclgevf_is_reset_pending
Annotated Snippet
struct hclgevf_mac {
u8 media_type;
u8 module_type;
u8 mac_addr[ETH_ALEN];
int link;
u8 duplex;
u32 speed;
u64 supported;
u64 advertising;
};
struct hclgevf_hw {
struct hclge_comm_hw hw;
int num_vec;
struct hclgevf_mac mac;
};
struct hclgevf_cfg {
u8 tc_num;
u16 tqp_desc_num;
u16 rx_buf_len;
u8 phy_addr;
u8 media_type;
u8 mac_addr[ETH_ALEN];
u32 numa_node_map;
};
struct hclgevf_misc_vector {
u8 __iomem *addr;
int vector_irq;
char name[HNAE3_INT_NAME_LEN];
};
struct hclgevf_rst_stats {
u32 rst_cnt; /* the number of reset */
u32 vf_func_rst_cnt; /* the number of VF function reset */
u32 flr_rst_cnt; /* the number of FLR */
u32 vf_rst_cnt; /* the number of VF reset */
u32 rst_done_cnt; /* the number of reset completed */
u32 hw_rst_done_cnt; /* the number of HW reset completed */
u32 rst_fail_cnt; /* the number of VF reset fail */
};
enum HCLGEVF_MAC_ADDR_TYPE {
HCLGEVF_MAC_ADDR_UC,
HCLGEVF_MAC_ADDR_MC
};
enum HCLGEVF_MAC_NODE_STATE {
HCLGEVF_MAC_TO_ADD,
HCLGEVF_MAC_TO_DEL,
HCLGEVF_MAC_ACTIVE
};
struct hclgevf_mac_addr_node {
struct list_head node;
enum HCLGEVF_MAC_NODE_STATE state;
u8 mac_addr[ETH_ALEN];
};
struct hclgevf_mac_table_cfg {
spinlock_t mac_list_lock; /* protect mac address need to add/detele */
struct list_head uc_mac_list;
struct list_head mc_mac_list;
};
struct hclgevf_dev {
struct pci_dev *pdev;
struct hnae3_ae_dev *ae_dev;
struct hclgevf_hw hw;
struct hclgevf_misc_vector misc_vector;
struct hclge_comm_rss_cfg rss_cfg;
unsigned long state;
unsigned long flr_state;
unsigned long default_reset_request;
unsigned long last_reset_time;
enum hnae3_reset_type reset_level;
unsigned long reset_pending;
enum hnae3_reset_type reset_type;
struct timer_list reset_timer;
#define HCLGEVF_RESET_REQUESTED 0
#define HCLGEVF_RESET_PENDING 1
unsigned long reset_state; /* requested, pending */
struct hclgevf_rst_stats rst_stats;
u32 reset_attempts;
struct semaphore reset_sem; /* protect reset process */
u32 fw_version;
u16 mbx_api_version;
Annotation
- Immediate include surface: `linux/fs.h`, `linux/if_vlan.h`, `linux/types.h`, `net/devlink.h`, `hclge_mbx.h`, `hclgevf_cmd.h`, `hnae3.h`, `hclge_comm_rss.h`.
- Detected declarations: `struct hclgevf_mac`, `struct hclgevf_hw`, `struct hclgevf_cfg`, `struct hclgevf_misc_vector`, `struct hclgevf_rst_stats`, `struct hclgevf_mac_addr_node`, `struct hclgevf_mac_table_cfg`, `struct hclgevf_dev`, `enum hclgevf_evt_cause`, `enum hclgevf_states`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.