drivers/net/ethernet/huawei/hinic/hinic_hw_api_cmd.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/huawei/hinic/hinic_hw_api_cmd.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/huawei/hinic/hinic_hw_api_cmd.c- Extension
.c- Size
- 25651 bytes
- Lines
- 988
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/types.hlinux/errno.hlinux/pci.hlinux/device.hlinux/slab.hlinux/dma-mapping.hlinux/bitops.hlinux/err.hlinux/jiffies.hlinux/delay.hlinux/log2.hlinux/semaphore.hasm/byteorder.hasm/barrier.hhinic_hw_csr.hhinic_hw_if.hhinic_hw_api_cmd.h
Detected Declarations
enum api_cmd_data_formatenum api_cmd_typeenum api_cmd_bypassenum api_cmd_xor_chk_levelfunction xor_chksum_setfunction set_prod_idxfunction get_hw_cons_idxfunction dump_api_chain_regfunction chain_busyfunction datafunction prepare_cell_ctrlfunction prepare_api_cmdfunction prepare_cellfunction cmd_chain_prod_idx_incfunction api_cmd_status_updatefunction wait_for_status_pollfunction wait_for_api_cmd_completionfunction api_cmdfunction hinic_api_cmd_writefunction api_cmd_hw_restartfunction api_cmd_ctrl_initfunction api_cmd_set_status_addrfunction api_cmd_set_num_cellsfunction api_cmd_head_initfunction api_cmd_chain_hw_cleanfunction api_cmd_chain_hw_initfunction free_cmd_buffunction alloc_cmd_buffunction api_cmd_create_cellfunction api_cmd_destroy_cellfunction api_cmd_destroy_cellsfunction api_cmd_create_cellsfunction api_chain_initfunction api_chain_freefunction api_cmd_create_chainfunction api_cmd_destroy_chainfunction hinic_api_cmd_initfunction hinic_api_cmd_free
Annotated Snippet
if (chain->cons_idx == MASKED_IDX(chain, prod_idx + 1)) {
dev_err(&pdev->dev, "API CMD chain %d is busy, cons_idx: %d, prod_idx: %d\n",
chain->chain_type, chain->cons_idx,
chain->prod_idx);
dump_api_chain_reg(chain);
return -EBUSY;
}
break;
default:
dev_err(&pdev->dev, "Unknown API CMD Chain type\n");
break;
}
return 0;
}
/**
* get_cell_data_size - get the data size of a specific cell type
* @type: chain type
*
* Return the data(Desc + Address) size in the cell
**/
static u8 get_cell_data_size(enum hinic_api_cmd_chain_type type)
{
u8 cell_data_size = 0;
switch (type) {
case HINIC_API_CMD_WRITE_TO_MGMT_CPU:
cell_data_size = ALIGN(API_CMD_CELL_DESC_SIZE +
API_CMD_CELL_DATA_ADDR_SIZE,
API_CMD_CELL_ALIGNMENT);
break;
default:
break;
}
return cell_data_size;
}
/**
* prepare_cell_ctrl - prepare the ctrl of the cell for the command
* @cell_ctrl: the control of the cell to set the control value into it
* @data_size: the size of the data in the cell
**/
static void prepare_cell_ctrl(u64 *cell_ctrl, u16 data_size)
{
u8 chksum;
u64 ctrl;
ctrl = HINIC_API_CMD_CELL_CTRL_SET(SIZE_8BYTES(data_size), DATA_SZ) |
HINIC_API_CMD_CELL_CTRL_SET(RD_DMA_ATTR_DEFAULT, RD_DMA_ATTR) |
HINIC_API_CMD_CELL_CTRL_SET(WR_DMA_ATTR_DEFAULT, WR_DMA_ATTR);
chksum = xor_chksum_set(&ctrl);
ctrl |= HINIC_API_CMD_CELL_CTRL_SET(chksum, XOR_CHKSUM);
/* The data in the HW should be in Big Endian Format */
*cell_ctrl = cpu_to_be64(ctrl);
}
/**
* prepare_api_cmd - prepare API CMD command
* @chain: chain for the command
* @dest: destination node on the card that will receive the command
* @cmd: command data
* @cmd_size: the command size
**/
static void prepare_api_cmd(struct hinic_api_cmd_chain *chain,
enum hinic_node_id dest,
void *cmd, u16 cmd_size)
{
struct hinic_api_cmd_cell *cell = chain->curr_node;
struct hinic_api_cmd_cell_ctxt *cell_ctxt;
struct hinic_hwif *hwif = chain->hwif;
struct pci_dev *pdev = hwif->pdev;
cell_ctxt = &chain->cell_ctxt[chain->prod_idx];
switch (chain->chain_type) {
case HINIC_API_CMD_WRITE_TO_MGMT_CPU:
cell->desc = HINIC_API_CMD_DESC_SET(SGE_DATA, API_TYPE) |
HINIC_API_CMD_DESC_SET(API_CMD_WRITE, RD_WR) |
HINIC_API_CMD_DESC_SET(NO_BYPASS, MGMT_BYPASS);
break;
default:
dev_err(&pdev->dev, "unknown Chain type\n");
return;
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/types.h`, `linux/errno.h`, `linux/pci.h`, `linux/device.h`, `linux/slab.h`, `linux/dma-mapping.h`, `linux/bitops.h`.
- Detected declarations: `enum api_cmd_data_format`, `enum api_cmd_type`, `enum api_cmd_bypass`, `enum api_cmd_xor_chk_level`, `function xor_chksum_set`, `function set_prod_idx`, `function get_hw_cons_idx`, `function dump_api_chain_reg`, `function chain_busy`, `function data`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.