drivers/net/ethernet/huawei/hinic/hinic_hw_if.h

File Facts

System

Linux kernel

Corpus path

drivers/net/ethernet/huawei/hinic/hinic_hw_if.h

Extension

.h

Size

10476 bytes

Lines

296

Domain

Driver Families

Bucket

drivers/net

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Touches IRQ or DMA behavior; this matters for the representative real-device path.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/pci.h
• linux/io.h
• linux/types.h
• asm/byteorder.h

Detected Declarations

• struct hinic_func_attr
• struct hinic_hwif
• enum hinic_pcie_nosnoop
• enum hinic_pcie_tph
• enum hinic_func_type
• enum hinic_mod_type
• enum hinic_node_id
• enum hinic_pf_action
• enum hinic_outbound_state
• enum hinic_db_state
• enum hinic_msix_state
• function hinic_hwif_read_reg
• function hinic_hwif_write_reg

Annotated Snippet

struct hinic_func_attr {
	u16                     func_idx;
	u8                      pf_idx;
	u8                      pci_intf_idx;

	enum hinic_func_type    func_type;

	u8                      ppf_idx;

	u16                     num_irqs;
	u8                      num_aeqs;
	u8                      num_ceqs;

	u8                      num_dma_attr;

	u16						global_vf_id_of_pf;
};

struct hinic_hwif {
	struct pci_dev          *pdev;
	void __iomem            *cfg_regs_bar;
	void __iomem		*intr_regs_base;

	struct hinic_func_attr  attr;
};

static inline u32 hinic_hwif_read_reg(struct hinic_hwif *hwif, u32 reg)
{
	u32 out = readl(hwif->cfg_regs_bar + reg);

	return be32_to_cpu(*(__be32 *)&out);
}

static inline void hinic_hwif_write_reg(struct hinic_hwif *hwif, u32 reg,
					u32 val)
{
	__be32 in = cpu_to_be32(val);

	writel(*(u32 *)&in, hwif->cfg_regs_bar + reg);
}

int hinic_msix_attr_set(struct hinic_hwif *hwif, u16 msix_index,
			u8 pending_limit, u8 coalesc_timer,
			u8 lli_timer_cfg, u8 lli_credit_limit,
			u8 resend_timer);

void hinic_set_msix_state(struct hinic_hwif *hwif, u16 msix_idx,
			  enum hinic_msix_state flag);

int hinic_msix_attr_cnt_clear(struct hinic_hwif *hwif, u16 msix_index);

void hinic_set_pf_action(struct hinic_hwif *hwif, enum hinic_pf_action action);

enum hinic_outbound_state hinic_outbound_state_get(struct hinic_hwif *hwif);

void hinic_outbound_state_set(struct hinic_hwif *hwif,
			      enum hinic_outbound_state outbound_state);

enum hinic_db_state hinic_db_state_get(struct hinic_hwif *hwif);

void hinic_db_state_set(struct hinic_hwif *hwif,
			enum hinic_db_state db_state);

u16 hinic_glb_pf_vf_offset(struct hinic_hwif *hwif);

u16 hinic_global_func_id_hw(struct hinic_hwif *hwif);

u16 hinic_pf_id_of_vf_hw(struct hinic_hwif *hwif);

int hinic_init_hwif(struct hinic_hwif *hwif, struct pci_dev *pdev);

void hinic_free_hwif(struct hinic_hwif *hwif);

#endif

Annotation

• Immediate include surface: `linux/pci.h`, `linux/io.h`, `linux/types.h`, `asm/byteorder.h`.
• Detected declarations: `struct hinic_func_attr`, `struct hinic_hwif`, `enum hinic_pcie_nosnoop`, `enum hinic_pcie_tph`, `enum hinic_func_type`, `enum hinic_mod_type`, `enum hinic_node_id`, `enum hinic_pf_action`, `enum hinic_outbound_state`, `enum hinic_db_state`.
• Atlas domain: Driver Families / drivers/net.
• Implementation status: source implementation candidate.
• IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.