drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c- Extension
.c- Size
- 42935 bytes
- Lines
- 1516
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/pci.hlinux/delay.hlinux/types.hlinux/completion.hlinux/semaphore.hlinux/spinlock.hlinux/workqueue.hhinic_hw_if.hhinic_hw_mgmt.hhinic_hw_csr.hhinic_hw_dev.hhinic_hw_mbox.h
Detected Declarations
enum hinic_mbox_tx_statusenum hinic_hwif_direction_typeenum mbox_send_modenum mbox_seg_typeenum mbox_ordering_typeenum mbox_write_back_typeenum mbox_aeq_trig_typefunction check_func_idfunction hinic_mbox_check_func_id_8Bfunction hinic_register_pf_mbox_cbfunction hinic_register_vf_mbox_cbfunction hinic_unregister_pf_mbox_cbfunction hinic_unregister_vf_mbox_cbfunction recv_vf_mbox_handlerfunction recv_pf_from_vf_mbox_handlerfunction check_mbox_seq_id_and_seg_lenfunction resp_mbox_handlerfunction recv_func_mbox_work_handlerfunction recv_mbox_handlerfunction set_vf_mbox_random_idfunction update_random_id_work_handlerfunction check_vf_mbox_random_idfunction hinic_mbox_func_aeqe_handlerfunction hinic_mbox_self_aeqe_handlerfunction clear_mbox_statusfunction mbox_copy_headerfunction mbox_copy_send_datafunction write_mbox_msg_attrfunction dump_mox_regfunction get_mbox_statusfunction wait_for_mbox_seg_completionfunction send_mbox_segfunction send_mbox_to_funcfunction response_for_recv_func_mboxfunction recv_func_mbox_handlerfunction set_mbox_to_func_eventfunction mbox_resp_info_handlerfunction hinic_mbox_to_funcfunction mbox_func_params_validfunction hinic_mbox_to_pffunction hinic_mbox_to_vffunction init_mbox_infofunction clean_mbox_infofunction alloc_mbox_infofunction free_mbox_infofunction prepare_send_mboxfunction alloc_mbox_wb_statusfunction free_mbox_wb_status
Annotated Snippet
if (vf_in_pf < 1 || vf_in_pf > hwdev->nic_cap.max_vf) {
dev_warn(&hwdev->hwif->pdev->dev,
"Receive vf id(0x%x) is invalid, vf id should be from 0x%x to 0x%x\n",
src, offset + 1,
hwdev->nic_cap.max_vf + offset);
return false;
}
}
random_id = be32_to_cpu(*(u32 *)(header + MBOX_SEG_LEN +
MBOX_HEADER_SZ));
if (random_id == func_to_func->vf_mbx_rand_id[src] ||
random_id == func_to_func->vf_mbx_old_rand_id[src])
return true;
dev_warn(&hwdev->hwif->pdev->dev,
"The mailbox random id(0x%x) of func_id(0x%x) doesn't match with pf reservation(0x%x)\n",
random_id, src, func_to_func->vf_mbx_rand_id[src]);
mbox_work = kzalloc_obj(*mbox_work);
if (!mbox_work)
return false;
mbox_work->func_to_func = func_to_func;
mbox_work->src_func_idx = src;
INIT_WORK(&mbox_work->work, update_random_id_work_handler);
queue_work(func_to_func->workq, &mbox_work->work);
return false;
}
static void hinic_mbox_func_aeqe_handler(void *handle, void *header, u8 size)
{
struct hinic_mbox_func_to_func *func_to_func;
u64 mbox_header = *((u64 *)header);
struct hinic_recv_mbox *recv_mbox;
u64 src, dir;
func_to_func = ((struct hinic_hwdev *)handle)->func_to_func;
dir = HINIC_MBOX_HEADER_GET(mbox_header, DIRECTION);
src = HINIC_MBOX_HEADER_GET(mbox_header, SRC_GLB_FUNC_IDX);
if (src >= HINIC_MAX_FUNCTIONS) {
dev_err(&func_to_func->hwif->pdev->dev,
"Mailbox source function id:%u is invalid\n", (u32)src);
return;
}
if (!check_vf_mbox_random_id(func_to_func, header))
return;
recv_mbox = (dir == HINIC_HWIF_DIRECT_SEND) ?
&func_to_func->mbox_send[src] :
&func_to_func->mbox_resp[src];
recv_mbox_handler(func_to_func, (u64 *)header, recv_mbox);
}
static void hinic_mbox_self_aeqe_handler(void *handle, void *header, u8 size)
{
struct hinic_mbox_func_to_func *func_to_func;
struct hinic_send_mbox *send_mbox;
func_to_func = ((struct hinic_hwdev *)handle)->func_to_func;
send_mbox = &func_to_func->send_mbox;
complete(&send_mbox->send_done);
}
static void clear_mbox_status(struct hinic_send_mbox *mbox)
{
*mbox->wb_status = 0;
/* clear mailbox write back status */
wmb();
}
static void mbox_copy_header(struct hinic_hwdev *hwdev,
struct hinic_send_mbox *mbox, u64 *header)
{
u32 i, idx_max = MBOX_HEADER_SZ / sizeof(u32);
u32 *data = (u32 *)header;
for (i = 0; i < idx_max; i++)
__raw_writel(*(data + i), mbox->data + i * sizeof(u32));
}
Annotation
- Immediate include surface: `linux/pci.h`, `linux/delay.h`, `linux/types.h`, `linux/completion.h`, `linux/semaphore.h`, `linux/spinlock.h`, `linux/workqueue.h`, `hinic_hw_if.h`.
- Detected declarations: `enum hinic_mbox_tx_status`, `enum hinic_hwif_direction_type`, `enum mbox_send_mod`, `enum mbox_seg_type`, `enum mbox_ordering_type`, `enum mbox_write_back_type`, `enum mbox_aeq_trig_type`, `function check_func_id`, `function hinic_mbox_check_func_id_8B`, `function hinic_register_pf_mbox_cb`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.