drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.c- Extension
.c- Size
- 16299 bytes
- Lines
- 611
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hhinic3_cmdq.hhinic3_hw_comm.hhinic3_hwdev.hhinic3_hwif.hhinic3_mbox.h
Detected Declarations
function hinic3_get_interrupt_cfgfunction hinic3_set_interrupt_cfg_directfunction hinic3_set_interrupt_cfgfunction hinic3_func_resetfunction hinic3_comm_features_negofunction hinic3_get_comm_featuresfunction hinic3_set_comm_featuresfunction hinic3_get_global_attrfunction hinic3_set_func_svc_used_statefunction hinic3_set_dma_attr_tblfunction hinic3_set_wq_page_sizefunction hinic3_set_cmdq_depthfunction hinic3_check_flr_finish_handlerfunction hinic3_wait_for_flr_finishfunction check_cmdq_stop_handlerfunction wait_cmdq_stopfunction hinic3_func_rx_tx_flushfunction hinic3_set_bdf_ctxtfunction hinic3_sync_timefunction hinic3_sync_time_to_fwfunction get_hw_rx_buf_size_idxfunction hinic3_set_root_ctxtfunction hinic3_clean_root_ctxtfunction hinic3_get_mgmt_version
Annotated Snippet
if (err) {
dev_warn(hwdev->dev, "Wait firmware FLR timeout\n");
ret = err;
}
}
hinic3_toggle_doorbell(hwif, ENABLE_DOORBELL);
err = hinic3_reinit_cmdq_ctxts(hwdev);
if (err) {
dev_warn(hwdev->dev, "Failed to reinit cmdq\n");
ret = err;
}
return ret;
}
int hinic3_set_bdf_ctxt(struct hinic3_hwdev *hwdev,
struct comm_cmd_bdf_info *bdf_info)
{
struct mgmt_msg_params msg_params = {};
int err;
mgmt_msg_params_init_default(&msg_params, bdf_info, sizeof(*bdf_info));
err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,
COMM_CMD_SEND_BDF_INFO, &msg_params);
if (err || bdf_info->head.status) {
dev_err(hwdev->dev,
"Failed to set bdf info to fw, err: %d, status: 0x%x\n",
err, bdf_info->head.status);
return -EFAULT;
}
return 0;
}
static int hinic3_sync_time(struct hinic3_hwdev *hwdev, u64 time)
{
struct comm_cmd_sync_time time_info = {};
struct mgmt_msg_params msg_params = {};
int err;
time_info.mstime = time;
mgmt_msg_params_init_default(&msg_params, &time_info,
sizeof(time_info));
err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,
COMM_CMD_SYNC_TIME, &msg_params);
if (err || time_info.head.status) {
dev_err(hwdev->dev,
"Failed to sync time to mgmt, err: %d, status: 0x%x\n",
err, time_info.head.status);
return -EFAULT;
}
return 0;
}
void hinic3_sync_time_to_fw(struct hinic3_hwdev *hwdev)
{
struct timespec64 ts = {};
u64 time;
int err;
ktime_get_real_ts64(&ts);
time = (u64)(ts.tv_sec * MSEC_PER_SEC + ts.tv_nsec / NSEC_PER_MSEC);
err = hinic3_sync_time(hwdev, time);
if (err)
dev_err(hwdev->dev,
"Synchronize UTC time to firmware failed, err=%d\n",
err);
}
static int get_hw_rx_buf_size_idx(int rx_buf_sz, u16 *buf_sz_idx)
{
/* Supported RX buffer sizes in bytes. Configured by array index. */
static const int supported_sizes[16] = {
[0] = 32, [1] = 64, [2] = 96, [3] = 128,
[4] = 192, [5] = 256, [6] = 384, [7] = 512,
[8] = 768, [9] = 1024, [10] = 1536, [11] = 2048,
[12] = 3072, [13] = 4096, [14] = 8192, [15] = 16384,
};
u16 idx;
/* Scan from biggest to smallest. Choose supported size that is equal or
* smaller. For smaller value HW will under-utilize posted buffers. For
* bigger value HW may overrun posted buffers.
Annotation
- Immediate include surface: `linux/delay.h`, `hinic3_cmdq.h`, `hinic3_hw_comm.h`, `hinic3_hwdev.h`, `hinic3_hwif.h`, `hinic3_mbox.h`.
- Detected declarations: `function hinic3_get_interrupt_cfg`, `function hinic3_set_interrupt_cfg_direct`, `function hinic3_set_interrupt_cfg`, `function hinic3_func_reset`, `function hinic3_comm_features_nego`, `function hinic3_get_comm_features`, `function hinic3_set_comm_features`, `function hinic3_get_global_attr`, `function hinic3_set_func_svc_used_state`, `function hinic3_set_dma_attr_tbl`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.