drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c
Extension
.c
Size
14838 bytes
Lines
544
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.

#include <linux/bitfield.h>
#include <linux/device.h>
#include <linux/io.h>

#include "hinic3_common.h"
#include "hinic3_csr.h"
#include "hinic3_hwdev.h"
#include "hinic3_hwif.h"

#define HINIC3_HWIF_READY_TIMEOUT          10000
#define HINIC3_DB_AND_OUTBOUND_EN_TIMEOUT  60000
#define HINIC3_PCIE_LINK_DOWN              0xFFFFFFFF

/* config BAR4/5 4MB, DB & DWQE both 2MB */
#define HINIC3_DB_DWQE_SIZE    0x00400000

/* db/dwqe page size: 4K */
#define HINIC3_DB_PAGE_SIZE    0x00001000
#define HINIC3_DWQE_OFFSET     0x00000800
#define HINIC3_DB_MAX_AREAS    (HINIC3_DB_DWQE_SIZE / HINIC3_DB_PAGE_SIZE)

#define HINIC3_MAX_MSIX_ENTRY  2048

#define HINIC3_AF0_FUNC_GLOBAL_IDX_MASK  GENMASK(11, 0)
#define HINIC3_AF0_P2P_IDX_MASK          GENMASK(16, 12)
#define HINIC3_AF0_PCI_INTF_IDX_MASK     GENMASK(19, 17)
#define HINIC3_AF0_FUNC_TYPE_MASK        BIT(28)
#define HINIC3_AF0_GET(val, member) \
	FIELD_GET(HINIC3_AF0_##member##_MASK, val)

#define HINIC3_AF1_PPF_IDX_MASK           GENMASK(5, 0)
#define HINIC3_AF1_AEQS_PER_FUNC_MASK     GENMASK(9, 8)
#define HINIC3_AF1_MGMT_INIT_STATUS_MASK  BIT(30)
#define HINIC3_AF1_GET(val, member) \
	FIELD_GET(HINIC3_AF1_##member##_MASK, val)

#define HINIC3_AF2_CEQS_PER_FUNC_MASK      GENMASK(8, 0)
#define HINIC3_AF2_IRQS_PER_FUNC_MASK      GENMASK(26, 16)
#define HINIC3_AF2_GET(val, member) \
	FIELD_GET(HINIC3_AF2_##member##_MASK, val)

#define HINIC3_AF3_GLOBAL_VF_ID_OF_PF_MASK  GENMASK(27, 16)
#define HINIC3_AF3_GET(val, member) \
	FIELD_GET(HINIC3_AF3_##member##_MASK, val)

#define HINIC3_AF4_DOORBELL_CTRL_MASK  BIT(0)
#define HINIC3_AF4_GET(val, member) \
	FIELD_GET(HINIC3_AF4_##member##_MASK, val)
#define HINIC3_AF4_SET(val, member) \
	FIELD_PREP(HINIC3_AF4_##member##_MASK, val)

#define HINIC3_AF5_OUTBOUND_CTRL_MASK  BIT(0)
#define HINIC3_AF5_GET(val, member) \
	FIELD_GET(HINIC3_AF5_##member##_MASK, val)

#define HINIC3_AF6_PF_STATUS_MASK     GENMASK(15, 0)
#define HINIC3_AF6_FUNC_MAX_SQ_MASK   GENMASK(31, 23)
#define HINIC3_AF6_MSIX_FLEX_EN_MASK  BIT(22)
#define HINIC3_AF6_SET(val, member) \
	FIELD_PREP(HINIC3_AF6_##member##_MASK, val)
#define HINIC3_AF6_GET(val, member) \
	FIELD_GET(HINIC3_AF6_##member##_MASK, val)

#define HINIC3_PPF_ELECTION_IDX_MASK  GENMASK(5, 0)
#define HINIC3_PPF_ELECTION_SET(val, member) \
	FIELD_PREP(HINIC3_PPF_ELECTION_##member##_MASK, val)
#define HINIC3_PPF_ELECTION_GET(val, member) \
	FIELD_GET(HINIC3_PPF_ELECTION_##member##_MASK, val)

#define HINIC3_GET_REG_FLAG(reg)  ((reg) & (~(HINIC3_REGS_FLAG_MASK)))
#define HINIC3_GET_REG_ADDR(reg)  ((reg) & (HINIC3_REGS_FLAG_MASK))

static void __iomem *hinic3_reg_addr(struct hinic3_hwif *hwif, u32 reg)
{
	void __iomem *addr;

	if (HINIC3_GET_REG_FLAG(reg) == HINIC3_MGMT_REGS_FLAG)
		addr = hwif->mgmt_regs_base + HINIC3_GET_REG_ADDR(reg);
	else
		addr = hwif->cfg_regs_base + HINIC3_GET_REG_ADDR(reg);

	return addr;
}

u32 hinic3_hwif_read_reg(struct hinic3_hwif *hwif, u32 reg)
{
	void __iomem *addr = hinic3_reg_addr(hwif, reg);

Annotation

Implementation Notes