drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.h- Extension
.h- Size
- 6071 bytes
- Lines
- 219
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hhinic3_hwif.hhinic3_hw_intf.hhinic3_mgmt_interface.h
Detected Declarations
struct hinic3_hwdevstruct hinic3_nic_devstruct hinic3_sq_attrstruct mag_cmd_get_port_infostruct mag_cmd_set_port_enablestruct mag_cmd_get_xsfp_infostruct mag_cmd_get_xsfp_presentstruct hinic3_port_module_eventstruct hinic3_nic_port_infostruct hinic3_nic_pause_configstruct hinic3_nic_cfgenum hinic3_nic_event_typeenum mag_cmd_port_anenum mag_cmd_link_modeenum mag_wire_typeenum link_err_typeenum port_module_event_type
Annotated Snippet
struct hinic3_sq_attr {
u8 dma_attr_off;
u8 pending_limit;
u8 coalescing_time;
u8 intr_en;
u16 intr_idx;
u32 l2nic_sqn;
u64 ci_dma_base;
};
enum mag_cmd_port_an {
PORT_CFG_AN_ON = 1,
};
/* mag supported/advertised link mode bitmap */
enum mag_cmd_link_mode {
LINK_MODE_GE = 0,
LINK_MODE_10GE_BASE_R = 1,
LINK_MODE_25GE_BASE_R = 2,
LINK_MODE_40GE_BASE_R4 = 3,
LINK_MODE_50GE_BASE_R = 4,
LINK_MODE_50GE_BASE_R2 = 5,
LINK_MODE_100GE_BASE_R = 6,
LINK_MODE_100GE_BASE_R2 = 7,
LINK_MODE_100GE_BASE_R4 = 8,
LINK_MODE_200GE_BASE_R2 = 9,
LINK_MODE_200GE_BASE_R4 = 10,
LINK_MODE_MAX_NUMBERS,
LINK_MODE_UNKNOWN = 0xFFFF
};
struct mag_cmd_get_port_info {
struct mgmt_msg_head head;
u8 port_id;
u8 rsvd0[3];
u8 wire_type;
u8 an_support;
u8 an_en;
u8 duplex;
u8 speed;
u8 fec;
u8 lanes;
u8 rsvd1;
u32 supported_mode;
u32 advertised_mode;
u8 rsvd2[8];
};
#define MAG_CMD_PORT_DISABLE 0x0
#define MAG_CMD_TX_ENABLE 0x1
#define MAG_CMD_RX_ENABLE 0x2
/* the physical port is disabled only when all pf of the port are set to down,
* if any pf is enabled, the port is enabled
*/
struct mag_cmd_set_port_enable {
struct mgmt_msg_head head;
u16 function_id;
u16 rsvd0;
/* bitmap bit0:tx_en bit1:rx_en */
u8 state;
u8 rsvd1[3];
};
/* xsfp wire type, refers to cmis protocol definition */
enum mag_wire_type {
MAG_CMD_WIRE_TYPE_UNKNOWN = 0x0,
MAG_CMD_WIRE_TYPE_MM = 0x1,
MAG_CMD_WIRE_TYPE_SM = 0x2,
MAG_CMD_WIRE_TYPE_COPPER = 0x3,
MAG_CMD_WIRE_TYPE_ACC = 0x4,
MAG_CMD_WIRE_TYPE_BASET = 0x5,
MAG_CMD_WIRE_TYPE_AOC = 0x40,
MAG_CMD_WIRE_TYPE_ELECTRIC = 0x41,
MAG_CMD_WIRE_TYPE_BACKPLANE = 0x42
};
#define XSFP_INFO_MAX_SIZE 640
struct mag_cmd_get_xsfp_info {
struct mgmt_msg_head head;
u8 port_id;
u8 wire_type;
u16 out_len;
Annotation
- Immediate include surface: `linux/types.h`, `hinic3_hwif.h`, `hinic3_hw_intf.h`, `hinic3_mgmt_interface.h`.
- Detected declarations: `struct hinic3_hwdev`, `struct hinic3_nic_dev`, `struct hinic3_sq_attr`, `struct mag_cmd_get_port_info`, `struct mag_cmd_set_port_enable`, `struct mag_cmd_get_xsfp_info`, `struct mag_cmd_get_xsfp_present`, `struct hinic3_port_module_event`, `struct hinic3_nic_port_info`, `struct hinic3_nic_pause_config`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.