drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c
Extension
.c
Size
24324 bytes
Lines
890
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct hinic3_qp_ctxt_hdr {
	__le16 num_queues;
	__le16 queue_type;
	__le16 start_qid;
	__le16 rsvd;
};

struct hinic3_sq_ctxt {
	__le32 ci_pi;
	__le32 drop_mode_sp;
	__le32 wq_pfn_hi_owner;
	__le32 wq_pfn_lo;

	__le32 rsvd0;
	__le32 pkt_drop_thd;
	__le32 global_sq_id;
	__le32 vlan_ceq_attr;

	__le32 pref_cache;
	__le32 pref_ci_owner;
	__le32 pref_wq_pfn_hi_ci;
	__le32 pref_wq_pfn_lo;

	__le32 rsvd8;
	__le32 rsvd9;
	__le32 wq_block_pfn_hi;
	__le32 wq_block_pfn_lo;
};

struct hinic3_rq_ctxt {
	__le32 ci_pi;
	__le32 ceq_attr;
	__le32 wq_pfn_hi_type_owner;
	__le32 wq_pfn_lo;

	__le32 rsvd[3];
	__le32 cqe_sge_len;

	__le32 pref_cache;
	__le32 pref_ci_owner;
	__le32 pref_wq_pfn_hi_ci;
	__le32 pref_wq_pfn_lo;

	__le32 pi_paddr_hi;
	__le32 pi_paddr_lo;
	__le32 wq_block_pfn_hi;
	__le32 wq_block_pfn_lo;
};

struct hinic3_sq_ctxt_block {
	struct hinic3_qp_ctxt_hdr cmdq_hdr;
	struct hinic3_sq_ctxt     sq_ctxt[HINIC3_Q_CTXT_MAX];
};

struct hinic3_rq_ctxt_block {
	struct hinic3_qp_ctxt_hdr cmdq_hdr;
	struct hinic3_rq_ctxt     rq_ctxt[HINIC3_Q_CTXT_MAX];
};

struct hinic3_clean_queue_ctxt {
	struct hinic3_qp_ctxt_hdr cmdq_hdr;
	__le32                    rsvd;
};

#define SQ_CTXT_SIZE(num_sqs)  \
	(sizeof(struct hinic3_qp_ctxt_hdr) +  \
	(num_sqs) * sizeof(struct hinic3_sq_ctxt))

#define RQ_CTXT_SIZE(num_rqs)  \
	(sizeof(struct hinic3_qp_ctxt_hdr) +  \
	(num_rqs) * sizeof(struct hinic3_rq_ctxt))

#define SQ_CTXT_PREF_CI_HI_SHIFT           12
#define SQ_CTXT_PREF_CI_HI(val)            ((val) >> SQ_CTXT_PREF_CI_HI_SHIFT)

#define SQ_CTXT_PI_IDX_MASK                GENMASK(15, 0)
#define SQ_CTXT_CI_IDX_MASK                GENMASK(31, 16)
#define SQ_CTXT_CI_PI_SET(val, member)  \
	FIELD_PREP(SQ_CTXT_##member##_MASK, val)

#define SQ_CTXT_MODE_SP_FLAG_MASK          BIT(0)
#define SQ_CTXT_MODE_PKT_DROP_MASK         BIT(1)
#define SQ_CTXT_MODE_SET(val, member)  \
	FIELD_PREP(SQ_CTXT_MODE_##member##_MASK, val)

#define SQ_CTXT_WQ_PAGE_HI_PFN_MASK        GENMASK(19, 0)
#define SQ_CTXT_WQ_PAGE_OWNER_MASK         BIT(23)
#define SQ_CTXT_WQ_PAGE_SET(val, member)  \
	FIELD_PREP(SQ_CTXT_WQ_PAGE_##member##_MASK, val)

Annotation

Implementation Notes