drivers/net/ethernet/intel/e1000/e1000_hw.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/e1000/e1000_hw.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/e1000/e1000_hw.c- Extension
.c- Size
- 158283 bytes
- Lines
- 5631
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.he1000.h
Detected Declarations
function e1000_set_phy_typefunction e1000_phy_init_scriptfunction e1000_set_mac_typefunction e1000_set_media_typefunction e1000_reset_hwfunction e1000_init_hwfunction e1000_adjust_serdes_amplitudefunction e1000_setup_linkfunction e1000_phy_setupfunction asfunction e1000_setup_fiber_serdes_linkfunction Registerfunction e1000_phy_resetfunction gbe_dhg_phy_setupfunction e1000_copper_link_preconfigfunction e1000_copper_link_igp_setupfunction e1000_copper_link_mgp_setupfunction e1000_copper_link_autonegfunction timefunction e1000_copper_link_postconfigfunction e1000_setup_copper_linkfunction e1000_phy_setup_autonegfunction Registerfunction e1000_phy_force_speed_duplexfunction e1000_config_collision_distfunction e1000_config_mac_to_phyfunction e1000_force_mac_fcfunction mechanismfunction e1000_config_fc_after_link_upfunction Registerfunction capabilityfunction e1000_check_for_serdes_link_genericfunction e1000_check_for_linkfunction e1000_get_speed_and_duplexfunction outfunction e1000_raise_mdi_clkfunction e1000_lower_mdi_clkfunction e1000_shift_out_mdi_bitsfunction e1000_shift_in_mdi_bitsfunction e1000_read_phy_regfunction e1000_read_phy_reg_exfunction e1000_write_phy_regfunction e1000_write_phy_reg_exfunction e1000_phy_hw_resetfunction e1000_phy_resetfunction e1000_detect_gig_phyfunction e1000_phy_reset_dspfunction e1000_phy_igp_get_info
Annotated Snippet
switch (hw->mac_type) {
case e1000_82541:
case e1000_82547:
e1000_write_phy_reg(hw, 0x1F95, 0x0001);
e1000_write_phy_reg(hw, 0x1F71, 0xBD21);
e1000_write_phy_reg(hw, 0x1F79, 0x0018);
e1000_write_phy_reg(hw, 0x1F30, 0x1600);
e1000_write_phy_reg(hw, 0x1F31, 0x0014);
e1000_write_phy_reg(hw, 0x1F32, 0x161C);
e1000_write_phy_reg(hw, 0x1F94, 0x0003);
e1000_write_phy_reg(hw, 0x1F96, 0x003F);
e1000_write_phy_reg(hw, 0x2010, 0x0008);
break;
case e1000_82541_rev_2:
case e1000_82547_rev_2:
e1000_write_phy_reg(hw, 0x1F73, 0x0099);
break;
default:
break;
}
e1000_write_phy_reg(hw, 0x0000, 0x3300);
msleep(20);
/* Now enable the transmitter */
e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data);
if (hw->mac_type == e1000_82547) {
u16 fused, fine, coarse;
/* Move to analog registers page */
e1000_read_phy_reg(hw,
IGP01E1000_ANALOG_SPARE_FUSE_STATUS,
&fused);
if (!(fused & IGP01E1000_ANALOG_SPARE_FUSE_ENABLED)) {
e1000_read_phy_reg(hw,
IGP01E1000_ANALOG_FUSE_STATUS,
&fused);
fine = fused & IGP01E1000_ANALOG_FUSE_FINE_MASK;
coarse =
fused & IGP01E1000_ANALOG_FUSE_COARSE_MASK;
if (coarse >
IGP01E1000_ANALOG_FUSE_COARSE_THRESH) {
coarse -=
IGP01E1000_ANALOG_FUSE_COARSE_10;
fine -= IGP01E1000_ANALOG_FUSE_FINE_1;
} else if (coarse ==
IGP01E1000_ANALOG_FUSE_COARSE_THRESH)
fine -= IGP01E1000_ANALOG_FUSE_FINE_10;
fused =
(fused & IGP01E1000_ANALOG_FUSE_POLY_MASK) |
(fine & IGP01E1000_ANALOG_FUSE_FINE_MASK) |
(coarse &
IGP01E1000_ANALOG_FUSE_COARSE_MASK);
e1000_write_phy_reg(hw,
IGP01E1000_ANALOG_FUSE_CONTROL,
fused);
e1000_write_phy_reg(hw,
IGP01E1000_ANALOG_FUSE_BYPASS,
IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL);
}
}
}
}
/**
* e1000_set_mac_type - Set the mac type member in the hw struct.
* @hw: Struct containing variables accessed by shared code
*/
s32 e1000_set_mac_type(struct e1000_hw *hw)
{
switch (hw->device_id) {
case E1000_DEV_ID_82542:
switch (hw->revision_id) {
case E1000_82542_2_0_REV_ID:
hw->mac_type = e1000_82542_rev2_0;
break;
case E1000_82542_2_1_REV_ID:
hw->mac_type = e1000_82542_rev2_1;
break;
default:
/* Invalid 82542 revision ID */
return -E1000_ERR_MAC_TYPE;
}
Annotation
- Immediate include surface: `linux/bitfield.h`, `e1000.h`.
- Detected declarations: `function e1000_set_phy_type`, `function e1000_phy_init_script`, `function e1000_set_mac_type`, `function e1000_set_media_type`, `function e1000_reset_hw`, `function e1000_init_hw`, `function e1000_adjust_serdes_amplitude`, `function e1000_setup_link`, `function e1000_phy_setup`, `function as`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.