drivers/net/ethernet/intel/e1000e/ich8lan.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/e1000e/ich8lan.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/e1000e/ich8lan.c- Extension
.c- Size
- 173120 bytes
- Lines
- 6240
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
e1000.h
Detected Declarations
struct ich8_hsfstsstruct ich8_hsflctlstruct ich8_flraccstruct ich8_prfunction __er16flashfunction __er32flashfunction __ew16flashfunction __ew32flashfunction knownfunction e1000_toggle_lanphypc_pch_lptfunction e1000_reconfigure_k1_paramsfunction e1000_init_phy_workarounds_pchlanfunction e1000_init_phy_params_pchlanfunction e1000_init_phy_params_ich8lanfunction e1000_init_nvm_params_ich8lanfunction e1000_init_mac_params_ich8lanfunction __e1000_access_emi_reg_lockedfunction e1000_read_emi_reg_lockedfunction e1000_write_emi_reg_lockedfunction e1000_set_eee_pchlanfunction e1000_k1_workaround_lpt_lpfunction Reportingfunction e1000e_force_smbusfunction e1000_enable_ulp_lpt_lpfunction e1000_disable_ulp_lpt_lpfunction e1000_check_for_copper_link_ich8lanfunction e1000_get_variants_ich8lanfunction NVMfunction e1000_acquire_nvm_ich8lanfunction e1000_release_nvm_ich8lanfunction e1000_acquire_swflag_ich8lanfunction e1000_release_swflag_ich8lanfunction e1000_check_mng_mode_ich8lanfunction e1000_check_mng_mode_pchlanfunction e1000_rar_set_pch2lanfunction enginefunction enginefunction e1000_check_reset_block_ich8lanfunction e1000_write_smbus_addrfunction e1000_sw_lcd_config_ich8lanfunction e1000_k1_gig_workaround_hvfunction e1000_configure_k1_ich8lanfunction e1000_oem_bits_config_ich8lanfunction e1000_set_mdio_slow_mode_hvfunction e1000_hv_phy_workarounds_ich8lanfunction e1000_copy_rx_addrs_to_phy_ich8lanfunction e1000_lv_jumbo_workaround_ich8lanfunction e1000_lv_phy_workarounds_ich8lan
Annotated Snippet
struct ich8_hsfsts {
u16 flcdone:1; /* bit 0 Flash Cycle Done */
u16 flcerr:1; /* bit 1 Flash Cycle Error */
u16 dael:1; /* bit 2 Direct Access error Log */
u16 berasesz:2; /* bit 4:3 Sector Erase Size */
u16 flcinprog:1; /* bit 5 flash cycle in Progress */
u16 reserved1:2; /* bit 13:6 Reserved */
u16 reserved2:6; /* bit 13:6 Reserved */
u16 fldesvalid:1; /* bit 14 Flash Descriptor Valid */
u16 flockdn:1; /* bit 15 Flash Config Lock-Down */
} hsf_status;
u16 regval;
};
/* ICH GbE Flash Hardware Sequencing Flash control Register bit breakdown */
/* Offset 06h FLCTL */
union ich8_hws_flash_ctrl {
struct ich8_hsflctl {
u16 flcgo:1; /* 0 Flash Cycle Go */
u16 flcycle:2; /* 2:1 Flash Cycle */
u16 reserved:5; /* 7:3 Reserved */
u16 fldbcount:2; /* 9:8 Flash Data Byte Count */
u16 flockdn:6; /* 15:10 Reserved */
} hsf_ctrl;
u16 regval;
};
/* ICH Flash Region Access Permissions */
union ich8_hws_flash_regacc {
struct ich8_flracc {
u32 grra:8; /* 0:7 GbE region Read Access */
u32 grwa:8; /* 8:15 GbE region Write Access */
u32 gmrag:8; /* 23:16 GbE Master Read Access Grant */
u32 gmwag:8; /* 31:24 GbE Master Write Access Grant */
} hsf_flregacc;
u16 regval;
};
/* ICH Flash Protected Region */
union ich8_flash_protected_range {
struct ich8_pr {
u32 base:13; /* 0:12 Protected Range Base */
u32 reserved1:2; /* 13:14 Reserved */
u32 rpe:1; /* 15 Read Protection Enable */
u32 limit:13; /* 16:28 Protected Range Limit */
u32 reserved2:2; /* 29:30 Reserved */
u32 wpe:1; /* 31 Write Protection Enable */
} range;
u32 regval;
};
static void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw);
static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw);
static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank);
static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw,
u32 offset, u8 byte);
static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,
u8 *data);
static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,
u16 *data);
static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
u8 size, u16 *data);
static s32 e1000_read_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,
u32 *data);
static s32 e1000_read_flash_dword_ich8lan(struct e1000_hw *hw,
u32 offset, u32 *data);
static s32 e1000_write_flash_data32_ich8lan(struct e1000_hw *hw,
u32 offset, u32 data);
static s32 e1000_retry_write_flash_dword_ich8lan(struct e1000_hw *hw,
u32 offset, u32 dword);
static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw);
static s32 e1000_cleanup_led_ich8lan(struct e1000_hw *hw);
static s32 e1000_led_on_ich8lan(struct e1000_hw *hw);
static s32 e1000_led_off_ich8lan(struct e1000_hw *hw);
static s32 e1000_id_led_init_pchlan(struct e1000_hw *hw);
static s32 e1000_setup_led_pchlan(struct e1000_hw *hw);
static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw);
static s32 e1000_led_on_pchlan(struct e1000_hw *hw);
static s32 e1000_led_off_pchlan(struct e1000_hw *hw);
static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active);
static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw);
static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw);
static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link);
static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw);
static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw);
static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw);
static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index);
static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index);
static u32 e1000_rar_get_count_pch_lpt(struct e1000_hw *hw);
static s32 e1000_k1_workaround_lv(struct e1000_hw *hw);
Annotation
- Immediate include surface: `e1000.h`.
- Detected declarations: `struct ich8_hsfsts`, `struct ich8_hsflctl`, `struct ich8_flracc`, `struct ich8_pr`, `function __er16flash`, `function __er32flash`, `function __ew16flash`, `function __ew32flash`, `function known`, `function e1000_toggle_lanphypc_pch_lpt`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.