drivers/net/ethernet/intel/i40e/i40e_dcb.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/i40e/i40e_dcb.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/intel/i40e/i40e_dcb.h
Extension
.h
Size
9412 bytes
Lines
283
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct i40e_lldp_org_tlv {
	__be16 typelength;
	__be32 ouisubtype;
	u8 tlvinfo[1];
};

struct i40e_cee_tlv_hdr {
	__be16 typelen;
	u8 operver;
	u8 maxver;
};

struct i40e_cee_ctrl_tlv {
	struct i40e_cee_tlv_hdr hdr;
	__be32 seqno;
	__be32 ackno;
};

struct i40e_cee_feat_tlv {
	struct i40e_cee_tlv_hdr hdr;
	u8 en_will_err; /* Bits: |En|Will|Err|Reserved(5)| */
#define I40E_CEE_FEAT_TLV_ENABLE_MASK	0x80
#define I40E_CEE_FEAT_TLV_WILLING_MASK	0x40
#define I40E_CEE_FEAT_TLV_ERR_MASK	0x20
	u8 subtype;
	u8 tlvinfo[1];
};

struct i40e_cee_app_prio {
	__be16 protocol;
	u8 upper_oui_sel; /* Bits: |Upper OUI(6)|Selector(2)| */
#define I40E_CEE_APP_SELECTOR_MASK	0x03
	__be16 lower_oui;
	u8 prio_map;
};
#pragma pack()

enum i40e_get_fw_lldp_status_resp {
	I40E_GET_FW_LLDP_STATUS_DISABLED = 0,
	I40E_GET_FW_LLDP_STATUS_ENABLED = 1
};

/* Data structures to pass for SW DCBX */
struct i40e_rx_pb_config {
	u32	shared_pool_size;
	u32	shared_pool_high_wm;
	u32	shared_pool_low_wm;
	u32	shared_pool_high_thresh[I40E_MAX_TRAFFIC_CLASS];
	u32	shared_pool_low_thresh[I40E_MAX_TRAFFIC_CLASS];
	u32	tc_pool_size[I40E_MAX_TRAFFIC_CLASS];
	u32	tc_pool_high_wm[I40E_MAX_TRAFFIC_CLASS];
	u32	tc_pool_low_wm[I40E_MAX_TRAFFIC_CLASS];
};

enum i40e_dcb_arbiter_mode {
	I40E_DCB_ARB_MODE_STRICT_PRIORITY = 0,
	I40E_DCB_ARB_MODE_ROUND_ROBIN = 1
};

#define I40E_DCB_DEFAULT_MAX_EXPONENT		0xB
#define I40E_DEFAULT_PAUSE_TIME			0xffff
#define I40E_MAX_FRAME_SIZE			4608 /* 4.5 KB */

#define I40E_DEVICE_RPB_SIZE			968000 /* 968 KB */

/* BitTimes (BT) conversion */
#define I40E_BT2KB(BT) (((BT) + (8 * 1024 - 1)) / (8 * 1024))
#define I40E_B2BT(BT) ((BT) * 8)
#define I40E_BT2B(BT) (((BT) + (8 - 1)) / 8)

/* Max Frame(TC) = MFS(max) + MFS(TC) */
#define I40E_MAX_FRAME_TC(mfs_max, mfs_tc)	I40E_B2BT((mfs_max) + (mfs_tc))

/* EEE Tx LPI Exit time in Bit Times */
#define I40E_EEE_TX_LPI_EXIT_TIME		142500

/* PCI Round Trip Time in Bit Times */
#define I40E_PCIRTT_LINK_SPEED_10G		20000
#define I40E_PCIRTT_BYTE_LINK_SPEED_20G		40000
#define I40E_PCIRTT_BYTE_LINK_SPEED_40G		80000

/* PFC Frame Delay Bit Times */
#define I40E_PFC_FRAME_DELAY			672

/* Worst case Cable (10GBase-T) Delay Bit Times */
#define I40E_CABLE_DELAY			5556

/* Higher Layer Delay @10G Bit Times */
#define I40E_HIGHER_LAYER_DELAY_10G		6144

Annotation

Implementation Notes