drivers/net/ethernet/intel/iavf/iavf_type.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/iavf/iavf_type.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/iavf/iavf_type.h- Extension
.h- Size
- 17155 bytes
- Lines
- 531
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
iavf_status.hiavf_osdep.hiavf_register.hiavf_adminq.hiavf_devids.h
Detected Declarations
struct iavf_hwstruct iavf_hw_capabilitiesstruct iavf_mac_infostruct iavf_bus_infostruct iavf_hwstruct iavf_rx_descstruct iavf_tx_descstruct iavf_tx_context_descstruct iavf_eth_statsenum iavf_debug_maskenum iavf_vsi_typeenum iavf_queue_typeenum iavf_bus_typeenum iavf_bus_speedenum iavf_bus_widthenum iavf_rx_desc_fltstat_valuesenum iavf_rx_desc_error_l3l4e_fcoe_masksenum iavf_rx_desc_ext_status_bitsenum iavf_rx_desc_pe_status_bitsenum iavf_rx_prog_status_desc_status_bitsenum iavf_rx_prog_status_desc_prog_id_masksenum iavf_rx_prog_status_desc_error_bitsenum iavf_tx_desc_dtype_valueenum iavf_tx_desc_cmd_bitsenum iavf_tx_desc_length_fieldsenum iavf_tx_ctx_desc_cmd_bitsenum iavf_tx_ctx_desc_eipt_offload
Annotated Snippet
struct iavf_hw_capabilities {
bool dcb;
bool fcoe;
u32 num_vsis;
u32 num_rx_qp;
u32 num_tx_qp;
u32 base_queue;
u32 num_msix_vectors_vf;
};
struct iavf_mac_info {
u8 addr[ETH_ALEN];
u8 perm_addr[ETH_ALEN];
};
/* PCI bus types */
enum iavf_bus_type {
iavf_bus_type_unknown = 0,
iavf_bus_type_pci,
iavf_bus_type_pcix,
iavf_bus_type_pci_express,
iavf_bus_type_reserved
};
/* PCI bus speeds */
enum iavf_bus_speed {
iavf_bus_speed_unknown = 0,
iavf_bus_speed_33 = 33,
iavf_bus_speed_66 = 66,
iavf_bus_speed_100 = 100,
iavf_bus_speed_120 = 120,
iavf_bus_speed_133 = 133,
iavf_bus_speed_2500 = 2500,
iavf_bus_speed_5000 = 5000,
iavf_bus_speed_8000 = 8000,
iavf_bus_speed_reserved
};
/* PCI bus widths */
enum iavf_bus_width {
iavf_bus_width_unknown = 0,
iavf_bus_width_pcie_x1 = 1,
iavf_bus_width_pcie_x2 = 2,
iavf_bus_width_pcie_x4 = 4,
iavf_bus_width_pcie_x8 = 8,
iavf_bus_width_32 = 32,
iavf_bus_width_64 = 64,
iavf_bus_width_reserved
};
/* Bus parameters */
struct iavf_bus_info {
enum iavf_bus_speed speed;
enum iavf_bus_width width;
enum iavf_bus_type type;
u16 func;
u16 device;
u16 lan_id;
u16 bus_id;
};
#define IAVF_MAX_USER_PRIORITY 8
/* Port hardware description */
struct iavf_hw {
u8 __iomem *hw_addr;
void *back;
/* subsystem structs */
struct iavf_mac_info mac;
struct iavf_bus_info bus;
/* pci info */
u16 device_id;
u16 vendor_id;
u16 subsystem_device_id;
u16 subsystem_vendor_id;
u8 revision_id;
/* capabilities for entire device and PCI func */
struct iavf_hw_capabilities dev_caps;
/* Admin Queue info */
struct iavf_adminq_info aq;
/* debug mask */
u32 debug_mask;
char err_str[16];
};
Annotation
- Immediate include surface: `iavf_status.h`, `iavf_osdep.h`, `iavf_register.h`, `iavf_adminq.h`, `iavf_devids.h`.
- Detected declarations: `struct iavf_hw`, `struct iavf_hw_capabilities`, `struct iavf_mac_info`, `struct iavf_bus_info`, `struct iavf_hw`, `struct iavf_rx_desc`, `struct iavf_tx_desc`, `struct iavf_tx_context_desc`, `struct iavf_eth_stats`, `enum iavf_debug_mask`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.