drivers/net/ethernet/intel/ice/ice_dpll.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/ice/ice_dpll.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/intel/ice/ice_dpll.h
Extension
.h
Size
6761 bytes
Lines
210
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct ice_dpll_pin_work {
	struct work_struct work;
	unsigned long action;
	struct ice_dpll_pin *pin;
};

/** ice_dpll_pin - store info about pins
 * @pin: dpll pin structure
 * @pf: pointer to pf, which has registered the dpll_pin
 * @tracker: reference count tracker
 * @idx: ice pin private idx
 * @num_parents: hols number of parent pins
 * @parent_idx: hold indexes of parent pins
 * @flags: pin flags returned from HW
 * @state: state of a pin
 * @prop: pin properties
 * @freq: current frequency of a pin
 * @phase_adjust: current phase adjust value
 * @phase_offset: monitored phase offset value
 * @ref_sync: store id of reference sync pin
 */
struct ice_dpll_pin {
	struct dpll_pin *pin;
	struct ice_pf *pf;
	dpll_tracker tracker;
	struct fwnode_handle *fwnode;
	struct notifier_block nb;
	u8 idx;
	u8 num_parents;
	u8 parent_idx[ICE_DPLL_RCLK_NUM_MAX];
	u8 flags[ICE_DPLL_RCLK_NUM_MAX];
	u8 state[ICE_DPLL_RCLK_NUM_MAX];
	struct dpll_pin_properties prop;
	u32 freq;
	s32 phase_adjust;
	struct ice_dpll_pin *input;
	struct ice_dpll_pin *output;
	enum dpll_pin_direction direction;
	s64 phase_offset;
	u8 status;
	u8 ref_sync;
	bool active;
	bool hidden;
	enum ice_e825c_ref_clk tx_ref_src;
};

/** ice_dpll - store info required for DPLL control
 * @dpll: pointer to dpll dev
 * @pf: pointer to pf, which has registered the dpll_device
 * @tracker: reference count tracker
 * @dpll_idx: index of dpll on the NIC
 * @input_idx: currently selected input index
 * @prev_input_idx: previously selected input index
 * @ref_state: state of dpll reference signals
 * @eec_mode: eec_mode dpll is configured for
 * @phase_offset: phase offset of active pin vs dpll signal
 * @prev_phase_offset: previous phase offset of active pin vs dpll signal
 * @input_prio: priorities of each input
 * @dpll_state: current dpll sync state
 * @prev_dpll_state: last dpll sync state
 * @phase_offset_monitor_period: period for phase offset monitor read frequency
 * @active_input: pointer to active input pin
 * @prev_input: pointer to previous active input pin
 * @ops: holds the registered ops
 */
struct ice_dpll {
	struct dpll_device *dpll;
	struct ice_pf *pf;
	dpll_tracker tracker;
	u8 dpll_idx;
	u8 input_idx;
	u8 prev_input_idx;
	u8 ref_state;
	u8 eec_mode;
	s64 phase_offset;
	s64 prev_phase_offset;
	u8 *input_prio;
	enum dpll_lock_status dpll_state;
	enum dpll_lock_status prev_dpll_state;
	enum dpll_mode mode;
	u32 phase_offset_monitor_period;
	struct dpll_pin *active_input;
	struct dpll_pin *prev_input;
	const struct dpll_device_ops *ops;
};

/** ice_dplls - store info required for CCU (clock controlling unit)
 * @kworker: periodic worker
 * @work: periodic work
 * @wq: workqueue used to schedule DPLL-related deferred work

Annotation

Implementation Notes