drivers/net/ethernet/intel/ice/ice_flex_pipe.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/ice/ice_flex_pipe.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/ice/ice_flex_pipe.c- Extension
.c- Size
- 113404 bytes
- Lines
- 4386
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
ice_common.hice_flex_pipe.hice_flow.hice.h
Detected Declarations
struct ice_blk_size_detailsstruct ice_prof_tcam_entrystruct ice_fd_src_dst_pairenum ice_sid_allfunction ice_sect_idfunction ice_hw_ptype_enafunction ice_gen_key_wordfunction ice_bits_max_setfunction ice_set_keyfunction ice_acquire_change_lockfunction ice_release_change_lockfunction ice_get_open_tunnel_portfunction ice_upd_dvm_boost_entryfunction ice_set_dvm_boost_entriesfunction ice_tunnel_idx_to_entryfunction ice_create_tunnelfunction ice_destroy_tunnelfunction ice_udp_tunnel_set_portfunction ice_udp_tunnel_unset_portfunction ice_find_prot_offfunction ICE_DEFAULT_PTGfunction ice_ptg_alloc_valfunction PTGfunction ICE_DEFAULT_PTGfunction ice_match_prop_lstfunction ice_vsig_find_vsifunction ice_vsig_alloc_valfunction ice_vsig_allocfunction ice_find_dup_props_vsigfunction ice_vsig_freefunction ice_vsig_remove_vsifunction ice_vsig_add_mv_vsifunction ice_prof_has_mask_idxfunction ice_prof_has_maskfunction ice_find_prof_id_with_maskfunction ice_prof_id_rsrc_typefunction ice_tcam_ent_rsrc_typefunction ice_alloc_tcam_entfunction ice_free_tcam_entfunction Vectorfunction ice_free_prof_idfunction ice_prof_inc_reffunction ice_write_prof_mask_regfunction ice_write_prof_mask_enable_resfunction ice_init_prof_masksfunction ice_init_all_prof_masksfunction ice_alloc_prof_maskfunction ice_free_prof_mask
Annotated Snippet
struct ice_blk_size_details {
u16 xlt1; /* # XLT1 entries */
u16 xlt2; /* # XLT2 entries */
u16 prof_tcam; /* # profile ID TCAM entries */
u16 prof_id; /* # profile IDs */
u8 prof_cdid_bits; /* # CDID one-hot bits used in key */
u16 prof_redir; /* # profile redirection entries */
u16 es; /* # extraction sequence entries */
u16 fvw; /* # field vector words */
u8 overwrite; /* overwrite existing entries allowed */
u8 reverse; /* reverse FV order */
};
static const struct ice_blk_size_details blk_sizes[ICE_BLK_COUNT] = {
/**
* Table Definitions
* XLT1 - Number of entries in XLT1 table
* XLT2 - Number of entries in XLT2 table
* TCAM - Number of entries Profile ID TCAM table
* CDID - Control Domain ID of the hardware block
* PRED - Number of entries in the Profile Redirection Table
* FV - Number of entries in the Field Vector
* FVW - Width (in WORDs) of the Field Vector
* OVR - Overwrite existing table entries
* REV - Reverse FV
*/
/* XLT1 , XLT2 ,TCAM, PID,CDID,PRED, FV, FVW */
/* Overwrite , Reverse FV */
/* SW */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 256, 0, 256, 256, 48,
false, false },
/* ACL */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 32,
false, false },
/* FD */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 24,
false, true },
/* RSS */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 24,
true, true },
/* PE */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 64, 32, 0, 32, 32, 24,
false, false },
};
enum ice_sid_all {
ICE_SID_XLT1_OFF = 0,
ICE_SID_XLT2_OFF,
ICE_SID_PR_OFF,
ICE_SID_PR_REDIR_OFF,
ICE_SID_ES_OFF,
ICE_SID_OFF_COUNT,
};
/* Characteristic handling */
/**
* ice_match_prop_lst - determine if properties of two lists match
* @list1: first properties list
* @list2: second properties list
*
* Count, cookies and the order must match in order to be considered equivalent.
*/
static bool
ice_match_prop_lst(struct list_head *list1, struct list_head *list2)
{
struct ice_vsig_prof *tmp1;
struct ice_vsig_prof *tmp2;
u16 chk_count = 0;
u16 count = 0;
/* compare counts */
list_for_each_entry(tmp1, list1, list)
count++;
list_for_each_entry(tmp2, list2, list)
chk_count++;
if (!count || count != chk_count)
return false;
tmp1 = list_first_entry(list1, struct ice_vsig_prof, list);
tmp2 = list_first_entry(list2, struct ice_vsig_prof, list);
/* profile cookies must compare, and in the exact same order to take
* into account priority
*/
while (count--) {
if (tmp2->profile_cookie != tmp1->profile_cookie)
return false;
tmp1 = list_next_entry(tmp1, list);
tmp2 = list_next_entry(tmp2, list);
}
return true;
}
Annotation
- Immediate include surface: `ice_common.h`, `ice_flex_pipe.h`, `ice_flow.h`, `ice.h`.
- Detected declarations: `struct ice_blk_size_details`, `struct ice_prof_tcam_entry`, `struct ice_fd_src_dst_pair`, `enum ice_sid_all`, `function ice_sect_id`, `function ice_hw_ptype_ena`, `function ice_gen_key_word`, `function ice_bits_max_set`, `function ice_set_key`, `function ice_acquire_change_lock`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.