drivers/net/ethernet/intel/ice/ice.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/ice/ice.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/ice/ice.h- Extension
.h- Size
- 35081 bytes
- Lines
- 1171
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/errno.hlinux/kernel.hlinux/module.hlinux/firmware.hlinux/netdevice.hlinux/compiler.hlinux/etherdevice.hlinux/skbuff.hlinux/cpumask.hlinux/rtnetlink.hlinux/if_vlan.hlinux/dma-mapping.hlinux/pci.hlinux/workqueue.hlinux/wait.hlinux/interrupt.hlinux/ethtool.hlinux/timer.hlinux/delay.hlinux/bitmap.hlinux/log2.hlinux/ip.hlinux/sctp.hlinux/ipv6.hlinux/pkt_sched.hlinux/if_bridge.hlinux/ctype.hlinux/linkmode.hlinux/bpf.hlinux/btf.hlinux/auxiliary_bus.h
Detected Declarations
struct ice_channelstruct ice_txq_metastruct ice_tc_infostruct ice_tc_cfgstruct ice_qs_cfgstruct ice_swstruct ice_vsi_statsstruct ice_vsistruct ice_q_vectorstruct ice_eswitchstruct ice_agg_nodestruct ice_pf_msixstruct ice_pfstruct ice_netdev_privstruct ice_aq_taskenum ice_featureenum ice_pf_stateenum ice_vsi_stateenum ice_pf_flagsenum ice_misc_thread_tasksenum ice_xdp_cfgenum ice_aq_task_statefunction ice_vector_ch_enabledfunction ice_ptp_pf_handles_tx_interruptfunction ice_irq_dynamic_enafunction ice_is_xdp_ena_vsifunction ice_set_ring_xdpfunction ice_is_txtime_enafunction ice_is_txtime_cfgfunction ice_rx_xsk_poolfunction ice_tx_xsk_poolfunction ice_get_max_txqfunction ice_get_max_rxqfunction ice_is_switchdev_runningfunction configuredfunction ice_set_rdma_capfunction ice_clear_rdma_capfunction ice_is_dualfunction ice_is_primaryfunction ice_pf_src_tmr_owned
Annotated Snippet
struct ice_channel {
struct list_head list;
u8 type;
u16 sw_id;
u16 base_q;
u16 num_rxq;
u16 num_txq;
u16 vsi_num;
u8 ena_tc;
struct ice_aqc_vsi_props info;
u64 max_tx_rate;
u64 min_tx_rate;
atomic_t num_sb_fltr;
struct ice_vsi *ch_vsi;
};
struct ice_txq_meta {
u32 q_teid; /* Tx-scheduler element identifier */
u16 q_id; /* Entry in VSI's txq_map bitmap */
u16 q_handle; /* Relative index of Tx queue within TC */
u16 vsi_idx; /* VSI index that Tx queue belongs to */
u8 tc; /* TC number that Tx queue belongs to */
};
struct ice_tc_info {
u16 qoffset;
u16 qcount_tx;
u16 qcount_rx;
u8 netdev_tc;
};
struct ice_tc_cfg {
u8 numtc; /* Total number of enabled TCs */
u16 ena_tc; /* Tx map */
struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
};
struct ice_qs_cfg {
struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */
unsigned long *pf_map;
unsigned long pf_map_size;
unsigned int q_count;
unsigned int scatter_count;
u16 *vsi_map;
u16 vsi_map_offset;
u8 mapping_mode;
};
struct ice_sw {
struct ice_pf *pf;
u16 sw_id; /* switch ID for this switch */
u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */
};
enum ice_pf_state {
ICE_TESTING,
ICE_DOWN,
ICE_NEEDS_RESTART,
ICE_PREPARED_FOR_RESET, /* set by driver when prepared */
ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */
ICE_PFR_REQ, /* set by driver */
ICE_CORER_REQ, /* set by driver */
ICE_GLOBR_REQ, /* set by driver */
ICE_CORER_RECV, /* set by OICR handler */
ICE_GLOBR_RECV, /* set by OICR handler */
ICE_EMPR_RECV, /* set by OICR handler */
ICE_SUSPENDED, /* set on module remove path */
ICE_RESET_FAILED, /* set by reset/rebuild */
/* When checking for the PF to be in a nominal operating state, the
* bits that are grouped at the beginning of the list need to be
* checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will
* be checked. If you need to add a bit into consideration for nominal
* operating state, it must be added before
* ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
* without appropriate consideration.
*/
ICE_STATE_NOMINAL_CHECK_BITS,
ICE_ADMINQ_EVENT_PENDING,
ICE_MAILBOXQ_EVENT_PENDING,
ICE_SIDEBANDQ_EVENT_PENDING,
ICE_MDD_EVENT_PENDING,
ICE_VFLR_EVENT_PENDING,
ICE_FLTR_OVERFLOW_PROMISC,
ICE_VF_DIS,
ICE_CFG_BUSY,
ICE_SERVICE_SCHED,
ICE_SERVICE_DIS,
ICE_FD_FLUSH_REQ,
ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */
ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */
Annotation
- Immediate include surface: `linux/types.h`, `linux/errno.h`, `linux/kernel.h`, `linux/module.h`, `linux/firmware.h`, `linux/netdevice.h`, `linux/compiler.h`, `linux/etherdevice.h`.
- Detected declarations: `struct ice_channel`, `struct ice_txq_meta`, `struct ice_tc_info`, `struct ice_tc_cfg`, `struct ice_qs_cfg`, `struct ice_sw`, `struct ice_vsi_stats`, `struct ice_vsi`, `struct ice_q_vector`, `struct ice_eswitch`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.