drivers/net/ethernet/intel/ice/ice_hwmon.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/ice/ice_hwmon.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/ice/ice_hwmon.c- Extension
.c- Size
- 2771 bytes
- Lines
- 127
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
ice.hice_hwmon.hice_adminq_cmd.hlinux/hwmon.h
Detected Declarations
function ice_hwmon_readfunction ice_hwmon_is_visiblefunction ice_is_internal_reading_supportedfunction ice_hwmon_initfunction ice_hwmon_exit
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/* Copyright (C) 2023, Intel Corporation. */
#include "ice.h"
#include "ice_hwmon.h"
#include "ice_adminq_cmd.h"
#include <linux/hwmon.h>
#define TEMP_FROM_REG(reg) ((reg) * 1000)
static const struct hwmon_channel_info *ice_hwmon_info[] = {
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_MAX |
HWMON_T_CRIT | HWMON_T_EMERGENCY),
NULL
};
static int ice_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct ice_aqc_get_sensor_reading_resp resp;
struct ice_pf *pf = dev_get_drvdata(dev);
int ret;
if (type != hwmon_temp)
return -EOPNOTSUPP;
ret = ice_aq_get_sensor_reading(&pf->hw, &resp);
if (ret) {
dev_warn_ratelimited(dev,
"%s HW read failure (%d)\n",
__func__,
ret);
return ret;
}
switch (attr) {
case hwmon_temp_input:
*val = TEMP_FROM_REG(resp.data.s0f0.temp);
break;
case hwmon_temp_max:
*val = TEMP_FROM_REG(resp.data.s0f0.temp_warning_threshold);
break;
case hwmon_temp_crit:
*val = TEMP_FROM_REG(resp.data.s0f0.temp_critical_threshold);
break;
case hwmon_temp_emergency:
*val = TEMP_FROM_REG(resp.data.s0f0.temp_fatal_threshold);
break;
default:
dev_dbg(dev, "%s unsupported attribute (%d)\n",
__func__, attr);
return -EOPNOTSUPP;
}
return 0;
}
static umode_t ice_hwmon_is_visible(const void *data,
enum hwmon_sensor_types type, u32 attr,
int channel)
{
if (type != hwmon_temp)
return 0;
switch (attr) {
case hwmon_temp_input:
case hwmon_temp_crit:
case hwmon_temp_max:
case hwmon_temp_emergency:
return 0444;
}
return 0;
}
static const struct hwmon_ops ice_hwmon_ops = {
.is_visible = ice_hwmon_is_visible,
.read = ice_hwmon_read
};
static const struct hwmon_chip_info ice_chip_info = {
.ops = &ice_hwmon_ops,
.info = ice_hwmon_info
};
static bool ice_is_internal_reading_supported(struct ice_pf *pf)
{
/* Only the first PF will report temperature for a chip.
Annotation
- Immediate include surface: `ice.h`, `ice_hwmon.h`, `ice_adminq_cmd.h`, `linux/hwmon.h`.
- Detected declarations: `function ice_hwmon_read`, `function ice_hwmon_is_visible`, `function ice_is_internal_reading_supported`, `function ice_hwmon_init`, `function ice_hwmon_exit`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.