drivers/net/ethernet/intel/ice/ice_parser.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/ice/ice_parser.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/ice/ice_parser.h- Extension
.h- Size
- 13686 bytes
- Lines
- 539
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct ice_bst_mainstruct ice_bst_keybuilderstruct ice_np_keybuilderstruct ice_pg_keybuilderstruct ice_alustruct ice_imem_itemstruct ice_metainit_itemstruct ice_pg_cam_keystruct ice_pg_nm_cam_keystruct ice_pg_cam_actionstruct ice_pg_cam_itemstruct ice_pg_nm_cam_itemstruct ice_bst_tcam_itemstruct ice_lbl_itemstruct ice_ptype_mk_tcam_itemstruct ice_mk_grp_itemstruct ice_proto_offstruct ice_proto_grp_itemstruct ice_flg_rd_itemstruct ice_xlt_kb_entrystruct ice_xlt_kbstruct ice_gpr_pustruct ice_parser_rtstruct ice_parser_proto_offstruct ice_parser_resultstruct ice_parserstruct ice_parser_fvstruct ice_parser_profileenum ice_np_keybuilder_opcodeenum ice_alu_idxenum ice_alu_opcodeenum ice_proto_off_opcodeenum ice_lbl_typeenum ice_pg_prio
Annotated Snippet
struct ice_bst_main {
bool alu0;
bool alu1;
bool alu2;
bool pg;
};
struct ice_bst_keybuilder {
u8 prio; /* 0-3: PG precedence within ALUs (3 highest) */
bool tsr_ctrl; /* TCAM Search Register control */
};
/* Next protocol Key builder */
struct ice_np_keybuilder {
u8 opc;
u8 start_reg0;
u8 len_reg1;
};
enum ice_np_keybuilder_opcode {
ICE_NPKB_OPC_EXTRACT = 0,
ICE_NPKB_OPC_BUILD = 1,
ICE_NPKB_OPC_BYPASS = 2,
};
/* Parse Graph Key builder */
struct ice_pg_keybuilder {
bool flag0_ena;
bool flag1_ena;
bool flag2_ena;
bool flag3_ena;
u8 flag0_idx;
u8 flag1_idx;
u8 flag2_idx;
u8 flag3_idx;
u8 alu_reg_idx;
};
enum ice_alu_idx {
ICE_ALU0_IDX = 0,
ICE_ALU1_IDX = 1,
ICE_ALU2_IDX = 2,
};
enum ice_alu_opcode {
ICE_ALU_PARK = 0,
ICE_ALU_MOV_ADD = 1,
ICE_ALU_ADD = 2,
ICE_ALU_MOV_AND = 4,
ICE_ALU_AND = 5,
ICE_ALU_AND_IMM = 6,
ICE_ALU_MOV_OR = 7,
ICE_ALU_OR = 8,
ICE_ALU_MOV_XOR = 9,
ICE_ALU_XOR = 10,
ICE_ALU_NOP = 11,
ICE_ALU_BR = 12,
ICE_ALU_BREQ = 13,
ICE_ALU_BRNEQ = 14,
ICE_ALU_BRGT = 15,
ICE_ALU_BRLT = 16,
ICE_ALU_BRGEQ = 17,
ICE_ALU_BRLEG = 18,
ICE_ALU_SETEQ = 19,
ICE_ALU_ANDEQ = 20,
ICE_ALU_OREQ = 21,
ICE_ALU_SETNEQ = 22,
ICE_ALU_ANDNEQ = 23,
ICE_ALU_ORNEQ = 24,
ICE_ALU_SETGT = 25,
ICE_ALU_ANDGT = 26,
ICE_ALU_ORGT = 27,
ICE_ALU_SETLT = 28,
ICE_ALU_ANDLT = 29,
ICE_ALU_ORLT = 30,
ICE_ALU_MOV_SUB = 31,
ICE_ALU_SUB = 32,
ICE_ALU_INVALID = 64,
};
enum ice_proto_off_opcode {
ICE_PO_OFF_REMAIN = 0,
ICE_PO_OFF_HDR_ADD = 1,
ICE_PO_OFF_HDR_SUB = 2,
};
struct ice_alu {
enum ice_alu_opcode opc;
u8 src_start;
u8 src_len;
Annotation
- Detected declarations: `struct ice_bst_main`, `struct ice_bst_keybuilder`, `struct ice_np_keybuilder`, `struct ice_pg_keybuilder`, `struct ice_alu`, `struct ice_imem_item`, `struct ice_metainit_item`, `struct ice_pg_cam_key`, `struct ice_pg_nm_cam_key`, `struct ice_pg_cam_action`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.