drivers/net/ethernet/intel/ice/ice_ptp.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/ice/ice_ptp.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/ice/ice_ptp.c- Extension
.c- Size
- 93436 bytes
- Lines
- 3437
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
ice.hice_lib.hice_trace.hice_txclk.h
Detected Declarations
struct ice_crosststamp_cfgstruct ice_crosststamp_ctxfunction ice_ptp_find_pin_idxfunction ice_ptp_cfg_tx_interruptfunction ice_set_rx_tstampfunction ice_ptp_disable_timestamp_modefunction ice_ptp_restore_timestamp_modefunction ice_ptp_read_src_clk_regfunction byfunction ice_ptp_extend_40b_tsfunction ice_ptp_is_tx_tracker_upfunction ice_ptp_req_tx_single_tstampfunction ice_ptp_complete_tx_single_tstampfunction ice_ptp_process_tx_tstampfunction for_each_set_bitfunction ice_ptp_tx_tstamp_ownerfunction ice_ptp_alloc_tx_trackerfunction ice_ptp_flush_tx_trackerfunction for_each_set_bitfunction ice_ptp_mark_tx_tracker_stalefunction ice_ptp_flush_all_tx_trackerfunction ice_ptp_release_tx_trackerfunction ice_ptp_init_tx_e82xfunction ice_ptp_init_txfunction ice_ptp_update_cached_phctimefunction time_is_before_jiffiesfunction ice_for_each_vsifunction ice_for_each_rxqfunction ice_ptp_reset_cached_phctimefunction ice_ptp_write_initfunction ice_ptp_write_adjfunction ice_base_incvalfunction ice_ptp_check_tx_fifofunction ice_ptp_wait_for_offsetsfunction ice_ptp_port_phy_stopfunction ice_ptp_port_phy_restartfunction ice_ptp_link_changefunction ice_ptp_cfg_phy_interruptfunction ice_ptp_reset_phy_timestampingfunction ice_ptp_restart_all_phyfunction list_for_eachfunction ice_ptp_adjfinefunction ice_ptp_extts_eventfunction ice_ptp_cfg_exttsfunction ice_ptp_disable_all_exttsfunction ice_ptp_enable_all_exttsfunction ice_ptp_write_peroutfunction ice_ptp_cfg_perout
Annotated Snippet
struct ice_crosststamp_cfg {
/* HW semaphore lock register */
u32 lock_reg;
u32 lock_busy;
/* Capture control register */
u32 ctl_reg;
u32 ctl_active;
/* Time storage */
u32 art_time_l;
u32 art_time_h;
u32 dev_time_l[2];
u32 dev_time_h[2];
};
static const struct ice_crosststamp_cfg ice_crosststamp_cfg_e82x = {
.lock_reg = PFHH_SEM,
.lock_busy = PFHH_SEM_BUSY_M,
.ctl_reg = GLHH_ART_CTL,
.ctl_active = GLHH_ART_CTL_ACTIVE_M,
.art_time_l = GLHH_ART_TIME_L,
.art_time_h = GLHH_ART_TIME_H,
.dev_time_l[0] = GLTSYN_HHTIME_L(0),
.dev_time_h[0] = GLTSYN_HHTIME_H(0),
.dev_time_l[1] = GLTSYN_HHTIME_L(1),
.dev_time_h[1] = GLTSYN_HHTIME_H(1),
};
#ifdef CONFIG_ICE_HWTS
static const struct ice_crosststamp_cfg ice_crosststamp_cfg_e830 = {
.lock_reg = E830_PFPTM_SEM,
.lock_busy = E830_PFPTM_SEM_BUSY_M,
.ctl_reg = E830_GLPTM_ART_CTL,
.ctl_active = E830_GLPTM_ART_CTL_ACTIVE_M,
.art_time_l = E830_GLPTM_ART_TIME_L,
.art_time_h = E830_GLPTM_ART_TIME_H,
.dev_time_l[0] = E830_GLTSYN_PTMTIME_L(0),
.dev_time_h[0] = E830_GLTSYN_PTMTIME_H(0),
.dev_time_l[1] = E830_GLTSYN_PTMTIME_L(1),
.dev_time_h[1] = E830_GLTSYN_PTMTIME_H(1),
};
#endif /* CONFIG_ICE_HWTS */
/**
* struct ice_crosststamp_ctx - Device cross timestamp context
* @snapshot: snapshot of system clocks for historic interpolation
* @snapshot_clock_id: System clock ID for @snapshot
* @pf: pointer to the PF private structure
* @cfg: pointer to hardware configuration for cross timestamp
*/
struct ice_crosststamp_ctx {
struct system_time_snapshot snapshot;
clockid_t snapshot_clock_id;
struct ice_pf *pf;
const struct ice_crosststamp_cfg *cfg;
};
/**
* ice_capture_crosststamp - Capture a device/system cross timestamp
* @device: Current device time
* @system: System counter value read synchronously with device time
* @__ctx: Context passed from ice_ptp_getcrosststamp
*
* Read device and system (ART) clock simultaneously and return the corrected
* clock values in ns.
*
* Return: zero on success, or a negative error code on failure.
*/
static int ice_capture_crosststamp(ktime_t *device,
struct system_counterval_t *system,
void *__ctx)
{
struct ice_crosststamp_ctx *ctx = __ctx;
const struct ice_crosststamp_cfg *cfg;
u32 lock, ctl, ts_lo, ts_hi, tmr_idx;
struct ice_pf *pf;
struct ice_hw *hw;
int err;
u64 ts;
cfg = ctx->cfg;
pf = ctx->pf;
hw = &pf->hw;
tmr_idx = hw->func_caps.ts_func_info.tmr_index_assoc;
if (tmr_idx > 1)
return -EINVAL;
/* Poll until we obtain the cross-timestamp hardware semaphore */
Annotation
- Immediate include surface: `ice.h`, `ice_lib.h`, `ice_trace.h`, `ice_txclk.h`.
- Detected declarations: `struct ice_crosststamp_cfg`, `struct ice_crosststamp_ctx`, `function ice_ptp_find_pin_idx`, `function ice_ptp_cfg_tx_interrupt`, `function ice_set_rx_tstamp`, `function ice_ptp_disable_timestamp_mode`, `function ice_ptp_restore_timestamp_mode`, `function ice_ptp_read_src_clk_reg`, `function by`, `function ice_ptp_extend_40b_ts`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.