drivers/net/ethernet/intel/ice/ice_switch.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/ice/ice_switch.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/ice/ice_switch.c- Extension
.c- Size
- 189295 bytes
- Lines
- 6655
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
ice_lib.hice_switch.hice_trace.h
Detected Declarations
struct ice_dummy_pkt_offsetsstruct ice_dummy_pkt_profilefunction ice_init_def_sw_recpfunction ice_aq_get_sw_cfgfunction hardwarefunction hardwarefunction hardwarefunction ice_is_vsi_validfunction ice_get_hw_vsi_numfunction ice_save_vsi_ctxfunction ice_clear_vsi_q_ctxfunction ice_clear_vsi_ctxfunction ice_clear_all_vsi_ctxfunction ice_add_vsifunction ice_free_vsifunction ice_update_vsifunction ice_cfg_rdma_fltrfunction ice_aq_alloc_free_vsi_listfunction Addfunction Addfunction Getfunction ice_update_recipe_lkup_idxfunction associationfunction recipefunction ice_init_chk_recipe_reuse_supportfunction ice_alloc_recipefunction ice_free_recipe_resfunction ice_release_recipe_resfunction for_each_set_bitfunction ice_get_recp_to_prof_mapfunction ice_get_recp_frm_fwfunction ice_init_port_infofunction ice_get_initial_sw_cfgfunction ice_fill_sw_infofunction ice_fill_eth_hdrfunction ice_fill_sw_rulefunction ice_add_marker_actfunction ice_create_vsi_list_mapfunction ice_update_vsi_list_rulefunction ice_create_vsi_list_rulefunction ice_create_pkt_fwd_rulefunction ice_update_pkt_fwd_rulefunction ice_update_sw_rule_bridge_modefunction filterfunction ice_find_rule_entryfunction ice_find_vsi_list_entryfunction ice_add_rule_internalfunction ice_remove_vsi_list_rule
Annotated Snippet
struct ice_dummy_pkt_offsets {
enum ice_protocol_type type;
u16 offset; /* ICE_PROTOCOL_LAST indicates end of list */
};
struct ice_dummy_pkt_profile {
const struct ice_dummy_pkt_offsets *offsets;
const u8 *pkt;
u32 match;
u16 pkt_len;
u16 offsets_len;
};
#define ICE_DECLARE_PKT_OFFSETS(type) \
static const struct ice_dummy_pkt_offsets \
ice_dummy_##type##_packet_offsets[]
#define ICE_DECLARE_PKT_TEMPLATE(type) \
static const u8 ice_dummy_##type##_packet[]
#define ICE_PKT_PROFILE(type, m) { \
.match = (m), \
.pkt = ice_dummy_##type##_packet, \
.pkt_len = sizeof(ice_dummy_##type##_packet), \
.offsets = ice_dummy_##type##_packet_offsets, \
.offsets_len = sizeof(ice_dummy_##type##_packet_offsets), \
}
ICE_DECLARE_PKT_OFFSETS(vlan) = {
{ ICE_VLAN_OFOS, 12 },
};
ICE_DECLARE_PKT_TEMPLATE(vlan) = {
0x81, 0x00, 0x00, 0x00, /* ICE_VLAN_OFOS 12 */
};
ICE_DECLARE_PKT_OFFSETS(qinq) = {
{ ICE_VLAN_EX, 12 },
{ ICE_VLAN_IN, 16 },
};
ICE_DECLARE_PKT_TEMPLATE(qinq) = {
0x91, 0x00, 0x00, 0x00, /* ICE_VLAN_EX 12 */
0x81, 0x00, 0x00, 0x00, /* ICE_VLAN_IN 16 */
};
ICE_DECLARE_PKT_OFFSETS(gre_tcp) = {
{ ICE_MAC_OFOS, 0 },
{ ICE_ETYPE_OL, 12 },
{ ICE_IPV4_OFOS, 14 },
{ ICE_NVGRE, 34 },
{ ICE_MAC_IL, 42 },
{ ICE_ETYPE_IL, 54 },
{ ICE_IPV4_IL, 56 },
{ ICE_TCP_IL, 76 },
{ ICE_PROTOCOL_LAST, 0 },
};
ICE_DECLARE_PKT_TEMPLATE(gre_tcp) = {
0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00,
0x08, 0x00, /* ICE_ETYPE_OL 12 */
0x45, 0x00, 0x00, 0x3E, /* ICE_IPV4_OFOS 14 */
0x00, 0x00, 0x00, 0x00,
0x00, 0x2F, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x65, 0x58, /* ICE_NVGRE 34 */
0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, /* ICE_MAC_IL 42 */
0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00,
0x08, 0x00, /* ICE_ETYPE_IL 54 */
0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 56 */
0x00, 0x00, 0x00, 0x00,
0x00, 0x06, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, /* ICE_TCP_IL 76 */
0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00,
0x50, 0x02, 0x20, 0x00,
Annotation
- Immediate include surface: `ice_lib.h`, `ice_switch.h`, `ice_trace.h`.
- Detected declarations: `struct ice_dummy_pkt_offsets`, `struct ice_dummy_pkt_profile`, `function ice_init_def_sw_recp`, `function ice_aq_get_sw_cfg`, `function hardware`, `function hardware`, `function hardware`, `function ice_is_vsi_valid`, `function ice_get_hw_vsi_num`, `function ice_save_vsi_ctx`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.