drivers/net/ethernet/intel/ice/virt/queues.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/ice/virt/queues.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/ice/virt/queues.c- Extension
.c- Size
- 27347 bytes
- Lines
- 976
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
virtchnl.hqueues.hice_vf_lib_private.hice.hice_base.hice_lib.h
Detected Declarations
function ice_vc_get_max_frame_sizefunction ice_vc_isvalid_q_idfunction ice_vc_isvalid_ring_lenfunction ice_vf_cfg_qs_bwfunction ice_vf_cfg_q_quanta_profilefunction ice_vc_validate_vqs_bitmapsfunction ice_vf_ena_txq_interruptfunction ice_vf_ena_rxq_interruptfunction queuefunction ice_vf_vsi_dis_single_txqfunction queuefunction for_each_set_bitfunction bitmap_equalfunction for_each_set_bitfunction ice_cfg_interruptfunction ice_vc_cfg_irq_map_msgfunction ice_vc_cfg_q_bwfunction ice_vc_cfg_q_quantafunction ice_vc_cfg_qs_msgfunction ice_vc_request_qs_msg
Annotated Snippet
if (n_used < per_pf) {
*quanta_prof_idx = begin_id + 1 + n_used;
pf->num_quanta_prof_used++;
} else {
return -EINVAL;
}
}
reg = FIELD_PREP(GLCOMM_QUANTA_PROF_QUANTA_SIZE_M, quanta_size) |
FIELD_PREP(GLCOMM_QUANTA_PROF_MAX_CMD_M, n_cmd) |
FIELD_PREP(GLCOMM_QUANTA_PROF_MAX_DESC_M, n_desc);
wr32(hw, GLCOMM_QUANTA_PROF(*quanta_prof_idx), reg);
return 0;
}
/**
* ice_vc_validate_vqs_bitmaps - validate Rx/Tx queue bitmaps from VIRTCHNL
* @vqs: virtchnl_queue_select structure containing bitmaps to validate
*
* Return true on successful validation, else false
*/
static bool ice_vc_validate_vqs_bitmaps(struct virtchnl_queue_select *vqs)
{
if ((!vqs->rx_queues && !vqs->tx_queues) ||
vqs->rx_queues >= BIT(ICE_MAX_RSS_QS_PER_VF) ||
vqs->tx_queues >= BIT(ICE_MAX_RSS_QS_PER_VF))
return false;
return true;
}
/**
* ice_vf_ena_txq_interrupt - enable Tx queue interrupt via QINT_TQCTL
* @vsi: VSI of the VF to configure
* @q_idx: VF queue index used to determine the queue in the PF's space
*/
void ice_vf_ena_txq_interrupt(struct ice_vsi *vsi, u32 q_idx)
{
struct ice_hw *hw = &vsi->back->hw;
u32 pfq = vsi->txq_map[q_idx];
u32 reg;
reg = rd32(hw, QINT_TQCTL(pfq));
/* MSI-X index 0 in the VF's space is always for the OICR, which means
* this is most likely a poll mode VF driver, so don't enable an
* interrupt that was never configured via VIRTCHNL_OP_CONFIG_IRQ_MAP
*/
if (!(reg & QINT_TQCTL_MSIX_INDX_M))
return;
wr32(hw, QINT_TQCTL(pfq), reg | QINT_TQCTL_CAUSE_ENA_M);
}
/**
* ice_vf_ena_rxq_interrupt - enable Tx queue interrupt via QINT_RQCTL
* @vsi: VSI of the VF to configure
* @q_idx: VF queue index used to determine the queue in the PF's space
*/
void ice_vf_ena_rxq_interrupt(struct ice_vsi *vsi, u32 q_idx)
{
struct ice_hw *hw = &vsi->back->hw;
u32 pfq = vsi->rxq_map[q_idx];
u32 reg;
reg = rd32(hw, QINT_RQCTL(pfq));
/* MSI-X index 0 in the VF's space is always for the OICR, which means
* this is most likely a poll mode VF driver, so don't enable an
* interrupt that was never configured via VIRTCHNL_OP_CONFIG_IRQ_MAP
*/
if (!(reg & QINT_RQCTL_MSIX_INDX_M))
return;
wr32(hw, QINT_RQCTL(pfq), reg | QINT_RQCTL_CAUSE_ENA_M);
}
/**
* ice_vc_ena_qs_msg
* @vf: pointer to the VF info
* @msg: pointer to the msg buffer
*
* called from the VF to enable all or specific queue(s)
*/
int ice_vc_ena_qs_msg(struct ice_vf *vf, u8 *msg)
{
enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;
struct virtchnl_queue_select *vqs =
(struct virtchnl_queue_select *)msg;
Annotation
- Immediate include surface: `virtchnl.h`, `queues.h`, `ice_vf_lib_private.h`, `ice.h`, `ice_base.h`, `ice_lib.h`.
- Detected declarations: `function ice_vc_get_max_frame_size`, `function ice_vc_isvalid_q_id`, `function ice_vc_isvalid_ring_len`, `function ice_vf_cfg_qs_bw`, `function ice_vf_cfg_q_quanta_profile`, `function ice_vc_validate_vqs_bitmaps`, `function ice_vf_ena_txq_interrupt`, `function ice_vf_ena_rxq_interrupt`, `function queue`, `function ice_vf_vsi_dis_single_txq`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.