drivers/net/ethernet/intel/ice/virt/virtchnl.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/ice/virt/virtchnl.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/ice/virt/virtchnl.c- Extension
.c- Size
- 82537 bytes
- Lines
- 2937
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
virtchnl.hqueues.hrss.hice_vf_lib_private.hice.hice_base.hice_lib.hice_fltr.hallowlist.hice_vf_vsi_vlan_ops.hice_vlan.hice_flex_pipe.hice_dcb_lib.h
Detected Declarations
function ice_vc_vf_broadcastfunction ice_set_pfe_linkfunction ice_vc_notify_vf_link_statefunction ice_vc_notify_link_statefunction ice_vc_notify_resetfunction ice_vc_send_msg_to_vffunction ice_vc_get_ver_msgfunction ice_vc_get_vlan_capsfunction ice_vc_get_vf_res_msgfunction ice_vc_reset_vf_msgfunction ice_vc_isvalid_vsi_idfunction ice_vc_get_qos_capsfunction ice_vc_cfg_promiscuous_mode_msgfunction ice_vc_get_stats_msgfunction ice_can_vf_change_macfunction ice_vc_ether_addr_typefunction ice_is_vc_addr_legacyfunction ice_is_vc_addr_primaryfunction ice_vfhw_mac_addfunction is_zero_ether_addrfunction ice_is_mc_lldp_eth_addrfunction ice_vc_can_add_macfunction ice_vc_add_mac_addrfunction ice_vfhw_mac_addfunction ice_is_legacy_umac_expiredfunction ice_update_legacy_cached_macfunction ice_vfhw_mac_delfunction ice_vc_del_mac_addrfunction ice_vc_handle_mac_addr_msgfunction ice_vc_add_mac_addr_msgfunction ice_vc_del_mac_addr_msgfunction ice_vf_vlan_offload_enafunction ice_is_vlan_promisc_allowedfunction ice_is_vlan_promisc_allowedfunction ice_is_vlan_promisc_allowedfunction ice_vf_has_max_vlansfunction ice_vc_process_vlan_msgfunction ice_vc_add_vlan_msgfunction ice_vc_remove_vlan_msgfunction ice_vsi_is_rxq_crc_strip_disfunction ice_vc_ena_vlan_strippingfunction ice_vc_dis_vlan_strippingfunction ice_vc_query_rxdidfunction ice_vf_init_vlan_strippingfunction ice_vc_get_max_vlan_fltrsfunction ice_vf_outer_vlan_not_allowedfunction ice_vc_set_dvm_capsfunction mode
Annotated Snippet
if (ice_is_dvm_ena(hw) && ice_vf_is_port_vlan_ena(vf)) {
return VIRTCHNL_VF_OFFLOAD_VLAN;
} else if (!ice_is_dvm_ena(hw) &&
!ice_vf_is_port_vlan_ena(vf)) {
/* configure backward compatible support for VFs that
* only support VIRTCHNL_VF_OFFLOAD_VLAN, the PF is
* configured in SVM, and no port VLAN is configured
*/
ice_vf_vsi_cfg_svm_legacy_vlan_mode(vsi);
return VIRTCHNL_VF_OFFLOAD_VLAN;
} else if (ice_is_dvm_ena(hw)) {
/* configure software offloaded VLAN support when DVM
* is enabled, but no port VLAN is enabled
*/
ice_vf_vsi_cfg_dvm_legacy_vlan_mode(vsi);
}
}
return 0;
}
/**
* ice_vc_get_vf_res_msg
* @vf: pointer to the VF info
* @msg: pointer to the msg buffer
*
* called from the VF to request its resources
*/
static int ice_vc_get_vf_res_msg(struct ice_vf *vf, u8 *msg)
{
enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;
struct virtchnl_vf_resource *vfres = NULL;
struct ice_hw *hw = &vf->pf->hw;
struct ice_vsi *vsi;
int len = 0;
int ret;
if (ice_check_vf_init(vf)) {
v_ret = VIRTCHNL_STATUS_ERR_PARAM;
goto err;
}
len = virtchnl_struct_size(vfres, vsi_res, 0);
vfres = kzalloc(len, GFP_KERNEL);
if (!vfres) {
v_ret = VIRTCHNL_STATUS_ERR_NO_MEMORY;
len = 0;
goto err;
}
if (VF_IS_V11(&vf->vf_ver))
vf->driver_caps = *(u32 *)msg;
else
vf->driver_caps = VIRTCHNL_VF_OFFLOAD_L2 |
VIRTCHNL_VF_OFFLOAD_VLAN;
vfres->vf_cap_flags = VIRTCHNL_VF_OFFLOAD_L2;
vsi = ice_get_vf_vsi(vf);
if (!vsi) {
v_ret = VIRTCHNL_STATUS_ERR_PARAM;
goto err;
}
vfres->vf_cap_flags |= ice_vc_get_vlan_caps(hw, vf, vsi,
vf->driver_caps);
if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PF)
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_PF;
if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC)
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC;
if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_FDIR_PF)
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_FDIR_PF;
if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_TC_U32 &&
vfres->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_FDIR_PF)
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_TC_U32;
if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP)
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP;
if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM)
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM;
if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING)
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RX_POLLING;
Annotation
- Immediate include surface: `virtchnl.h`, `queues.h`, `rss.h`, `ice_vf_lib_private.h`, `ice.h`, `ice_base.h`, `ice_lib.h`, `ice_fltr.h`.
- Detected declarations: `function ice_vc_vf_broadcast`, `function ice_set_pfe_link`, `function ice_vc_notify_vf_link_state`, `function ice_vc_notify_link_state`, `function ice_vc_notify_reset`, `function ice_vc_send_msg_to_vf`, `function ice_vc_get_ver_msg`, `function ice_vc_get_vlan_caps`, `function ice_vc_get_vf_res_msg`, `function ice_vc_reset_vf_msg`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.