drivers/net/ethernet/intel/igb/e1000_defines.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/igb/e1000_defines.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/intel/igb/e1000_defines.h
Extension
.h
Size
48079 bytes
Lines
1076
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _E1000_DEFINES_H_
#define _E1000_DEFINES_H_

/* Number of Transmit and Receive Descriptors must be a multiple of 8 */
#define REQ_TX_DESCRIPTOR_MULTIPLE  8
#define REQ_RX_DESCRIPTOR_MULTIPLE  8

/* Definitions for power management and wakeup registers */
/* Wake Up Control */
#define E1000_WUC_PME_EN     0x00000002 /* PME Enable */

/* Wake Up Filter Control */
#define E1000_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
#define E1000_WUFC_MAG  0x00000002 /* Magic Packet Wakeup Enable */
#define E1000_WUFC_EX   0x00000004 /* Directed Exact Wakeup Enable */
#define E1000_WUFC_MC   0x00000008 /* Directed Multicast Wakeup Enable */
#define E1000_WUFC_BC   0x00000010 /* Broadcast Wakeup Enable */

/* Wake Up Status */
#define E1000_WUS_EX	0x00000004 /* Directed Exact */
#define E1000_WUS_ARPD	0x00000020 /* Directed ARP Request */
#define E1000_WUS_IPV4	0x00000040 /* Directed IPv4 */
#define E1000_WUS_IPV6	0x00000080 /* Directed IPv6 */
#define E1000_WUS_NSD	0x00000400 /* Directed IPv6 Neighbor Solicitation */

/* Packet types that are enabled for wake packet delivery */
#define WAKE_PKT_WUS ( \
	E1000_WUS_EX   | \
	E1000_WUS_ARPD | \
	E1000_WUS_IPV4 | \
	E1000_WUS_IPV6 | \
	E1000_WUS_NSD)

/* Wake Up Packet Length */
#define E1000_WUPL_MASK	0x00000FFF

/* Wake Up Packet Memory stores the first 128 bytes of the wake up packet */
#define E1000_WUPM_BYTES	128

/* Extended Device Control */
#define E1000_CTRL_EXT_SDP2_DATA 0x00000040 /* Value of SW Defineable Pin 2 */
#define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Defineable Pin 3 */
#define E1000_CTRL_EXT_SDP2_DIR  0x00000400 /* SDP2 Data direction */
#define E1000_CTRL_EXT_SDP3_DIR  0x00000800 /* SDP3 Data direction */

/* Physical Func Reset Done Indication */
#define E1000_CTRL_EXT_PFRSTD	0x00004000
#define E1000_CTRL_EXT_SDLPE	0X00040000  /* SerDes Low Power Enable */
#define E1000_CTRL_EXT_LINK_MODE_MASK	0x00C00000
#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES	0x00C00000
#define E1000_CTRL_EXT_LINK_MODE_1000BASE_KX	0x00400000
#define E1000_CTRL_EXT_LINK_MODE_SGMII	0x00800000
#define E1000_CTRL_EXT_LINK_MODE_GMII	0x00000000
#define E1000_CTRL_EXT_EIAME	0x01000000
#define E1000_CTRL_EXT_IRCA		0x00000001
/* Interrupt delay cancellation */
/* Driver loaded bit for FW */
#define E1000_CTRL_EXT_DRV_LOAD       0x10000000
/* Interrupt acknowledge Auto-mask */
/* Clear Interrupt timers after IMS clear */
/* packet buffer parity error detection enabled */
/* descriptor FIFO parity error detection enable */
#define E1000_CTRL_EXT_PBA_CLR		0x80000000 /* PBA Clear */
#define E1000_CTRL_EXT_PHYPDEN		0x00100000
#define E1000_I2CCMD_REG_ADDR_SHIFT	16
#define E1000_I2CCMD_PHY_ADDR_SHIFT	24
#define E1000_I2CCMD_OPCODE_READ	0x08000000
#define E1000_I2CCMD_OPCODE_WRITE	0x00000000
#define E1000_I2CCMD_READY		0x20000000
#define E1000_I2CCMD_ERROR		0x80000000
#define E1000_I2CCMD_SFP_DATA_ADDR(a)	(0x0000 + (a))
#define E1000_I2CCMD_SFP_DIAG_ADDR(a)	(0x0100 + (a))
#define E1000_MAX_SGMII_PHY_REG_ADDR	255
#define E1000_I2CCMD_PHY_TIMEOUT	200
#define E1000_IVAR_VALID		0x80
#define E1000_GPIE_NSICR		0x00000001
#define E1000_GPIE_MSIX_MODE		0x00000010
#define E1000_GPIE_EIAME		0x40000000
#define E1000_GPIE_PBA			0x80000000

/* Receive Descriptor bit definitions */
#define E1000_RXD_STAT_DD       0x01    /* Descriptor Done */
#define E1000_RXD_STAT_EOP      0x02    /* End of Packet */
#define E1000_RXD_STAT_IXSM     0x04    /* Ignore checksum */
#define E1000_RXD_STAT_VP       0x08    /* IEEE VLAN Packet */
#define E1000_RXD_STAT_UDPCS    0x10    /* UDP xsum calculated */
#define E1000_RXD_STAT_TCPCS    0x20    /* TCP xsum calculated */
#define E1000_RXD_STAT_TS       0x10000 /* Pkt was time stamped */

#define E1000_RXDEXT_STATERR_LB    0x00040000

Annotation

Implementation Notes