drivers/net/ethernet/intel/igb/igb_main.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/igb/igb_main.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/igb/igb_main.c- Extension
.c- Size
- 282144 bytes
- Lines
- 10315
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/types.hlinux/init.hlinux/bitops.hlinux/vmalloc.hlinux/pagemap.hlinux/netdevice.hlinux/ipv6.hlinux/slab.hnet/checksum.hnet/ip6_checksum.hnet/pkt_sched.hnet/pkt_cls.hlinux/net_tstamp.hlinux/mii.hlinux/ethtool.hlinux/if.hlinux/if_vlan.hlinux/pci.hlinux/delay.hlinux/interrupt.hlinux/ip.hlinux/tcp.hlinux/sctp.hlinux/if_ether.hlinux/prefetch.hlinux/bpf.hlinux/bpf_trace.hlinux/pm_runtime.hlinux/etherdevice.hlinux/dca.hlinux/i2c.h
Detected Declarations
struct igb_reg_infostruct my_u0enum queue_modeenum tx_queue_prioenum latency_rangefunction igb_regdumpfunction igb_dumpfunction igb_get_i2c_datafunction igb_set_i2c_datafunction igb_set_i2c_clkfunction igb_get_i2c_clkfunction igb_init_modulefunction igb_exit_modulefunction igb_cache_ring_registerfunction igb_rd32function igb_write_ivarfunction igb_assign_vectorfunction igb_configure_msixfunction igb_request_msixfunction igb_free_q_vectorfunction igb_reset_q_vectorfunction igb_reset_interrupt_capabilityfunction igb_free_q_vectorsfunction igb_clear_interrupt_schemefunction igb_set_interrupt_capabilityfunction igb_add_ringfunction igb_alloc_q_vectorfunction igb_alloc_q_vectorsfunction igb_init_interrupt_schemefunction igb_request_irqfunction igb_free_irqfunction igb_irq_disablefunction igb_irq_enablefunction igb_update_mng_vlanfunction igb_release_hw_controlfunction igb_get_hw_controlfunction enable_fqtssfunction is_fqtss_enabledfunction set_tx_desc_fetch_priofunction set_queue_modefunction is_any_cbs_enabledfunction is_any_txtime_enabledfunction igb_save_cbs_paramsfunction igb_save_txtime_paramsfunction igb_save_cbs_paramsfunction igb_config_tx_modesfunction igb_configurefunction igb_power_up_link
Annotated Snippet
static struct pci_driver igb_driver;
/**
* igb_init_module - Driver Registration Routine
*
* igb_init_module is the first routine called when the driver is
* loaded. All it does is register with the PCI subsystem.
**/
static int __init igb_init_module(void)
{
int ret;
pr_info("%s\n", igb_driver_string);
pr_info("%s\n", igb_copyright);
#ifdef CONFIG_IGB_DCA
dca_register_notify(&dca_notifier);
#endif
ret = pci_register_driver(&igb_driver);
#ifdef CONFIG_IGB_DCA
if (ret)
dca_unregister_notify(&dca_notifier);
#endif
return ret;
}
module_init(igb_init_module);
/**
* igb_exit_module - Driver Exit Cleanup Routine
*
* igb_exit_module is called just before the driver is removed
* from memory.
**/
static void __exit igb_exit_module(void)
{
#ifdef CONFIG_IGB_DCA
dca_unregister_notify(&dca_notifier);
#endif
pci_unregister_driver(&igb_driver);
}
module_exit(igb_exit_module);
#define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
/**
* igb_cache_ring_register - Descriptor ring to register mapping
* @adapter: board private structure to initialize
*
* Once we know the feature-set enabled for the device, we'll cache
* the register offset the descriptor ring is assigned to.
**/
static void igb_cache_ring_register(struct igb_adapter *adapter)
{
int i = 0, j = 0;
u32 rbase_offset = adapter->vfs_allocated_count;
switch (adapter->hw.mac.type) {
case e1000_82576:
/* The queues are allocated for virtualization such that VF 0
* is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
* In order to avoid collision we start at the first free queue
* and continue consuming queues in the same sequence
*/
if (adapter->vfs_allocated_count) {
for (; i < adapter->rss_queues; i++)
adapter->rx_ring[i]->reg_idx = rbase_offset +
Q_IDX_82576(i);
}
fallthrough;
case e1000_82575:
case e1000_82580:
case e1000_i350:
case e1000_i354:
case e1000_i210:
case e1000_i211:
default:
for (; i < adapter->num_rx_queues; i++)
adapter->rx_ring[i]->reg_idx = rbase_offset + i;
for (; j < adapter->num_tx_queues; j++)
adapter->tx_ring[j]->reg_idx = rbase_offset + j;
break;
}
}
u32 igb_rd32(struct e1000_hw *hw, u32 reg)
{
struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
u32 value = 0;
Annotation
- Immediate include surface: `linux/module.h`, `linux/types.h`, `linux/init.h`, `linux/bitops.h`, `linux/vmalloc.h`, `linux/pagemap.h`, `linux/netdevice.h`, `linux/ipv6.h`.
- Detected declarations: `struct igb_reg_info`, `struct my_u0`, `enum queue_mode`, `enum tx_queue_prio`, `enum latency_range`, `function igb_regdump`, `function igb_dump`, `function igb_get_i2c_data`, `function igb_set_i2c_data`, `function igb_set_i2c_clk`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.