drivers/net/ethernet/intel/igbvf/igbvf.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/igbvf/igbvf.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/igbvf/igbvf.h- Extension
.h- Size
- 6436 bytes
- Lines
- 269
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/timer.hlinux/io.hlinux/netdevice.hlinux/if_vlan.hvf.h
Detected Declarations
struct igbvf_infostruct igbvf_adapterstruct igbvf_queue_statsstruct igbvf_bufferstruct igbvf_ringstruct igbvf_adapterstruct igbvf_infoenum latency_rangeenum igbvf_boardsenum igbvf_state_t
Annotated Snippet
struct igbvf_queue_stats {
u64 packets;
u64 bytes;
};
/* wrappers around a pointer to a socket buffer,
* so a DMA handle can be stored along with the buffer
*/
struct igbvf_buffer {
dma_addr_t dma;
struct sk_buff *skb;
union {
/* Tx */
struct {
unsigned long time_stamp;
union e1000_adv_tx_desc *next_to_watch;
u16 length;
u16 mapped_as_page;
};
/* Rx */
struct {
struct page *page;
u64 page_dma;
unsigned int page_offset;
};
};
};
union igbvf_desc {
union e1000_adv_rx_desc rx_desc;
union e1000_adv_tx_desc tx_desc;
struct e1000_adv_tx_context_desc tx_context_desc;
};
struct igbvf_ring {
struct igbvf_adapter *adapter; /* backlink */
union igbvf_desc *desc; /* pointer to ring memory */
dma_addr_t dma; /* phys address of ring */
unsigned int size; /* length of ring in bytes */
unsigned int count; /* number of desc. in ring */
u16 next_to_use;
u16 next_to_clean;
u16 head;
u16 tail;
/* array of buffer information structs */
struct igbvf_buffer *buffer_info;
struct napi_struct napi;
char name[IFNAMSIZ + 5];
u32 eims_value;
u32 itr_val;
enum latency_range itr_range;
u16 itr_register;
int set_itr;
struct sk_buff *rx_skb_top;
struct igbvf_queue_stats stats;
};
/* board specific private data structure */
struct igbvf_adapter {
struct timer_list watchdog_timer;
struct work_struct reset_task;
struct work_struct watchdog_task;
const struct igbvf_info *ei;
unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
u32 rx_buffer_len;
u16 link_speed;
u16 link_duplex;
/* track device up/down/testing state */
unsigned long state;
/* Interrupt Throttle Rate */
u32 requested_itr; /* ints/sec or adaptive */
u32 current_itr; /* Actual ITR register value, not ints/sec */
/* Tx */
struct igbvf_ring *tx_ring /* One per active queue */
____cacheline_aligned_in_smp;
unsigned int restart_queue;
u32 txd_cmd;
Annotation
- Immediate include surface: `linux/types.h`, `linux/timer.h`, `linux/io.h`, `linux/netdevice.h`, `linux/if_vlan.h`, `vf.h`.
- Detected declarations: `struct igbvf_info`, `struct igbvf_adapter`, `struct igbvf_queue_stats`, `struct igbvf_buffer`, `struct igbvf_ring`, `struct igbvf_adapter`, `struct igbvf_info`, `enum latency_range`, `enum igbvf_boards`, `enum igbvf_state_t`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.