drivers/net/ethernet/intel/igc/igc_i225.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/igc/igc_i225.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/intel/igc/igc_i225.c- Extension
.c- Size
- 16317 bytes
- Lines
- 642
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/delay.higc_hw.h
Detected Declarations
function igc_acquire_nvm_i225function igc_release_nvm_i225function igc_get_hw_semaphore_i225function igc_acquire_swfw_sync_i225function igc_release_swfw_sync_i225function igc_read_nvm_srrd_i225function igc_write_nvm_srwrfunction igc_write_nvm_srwr_i225function igc_validate_nvm_checksum_i225function igc_pool_flash_update_done_i225function igc_update_flash_i225function igc_update_nvm_checksum_i225function igc_get_flash_presence_i225function igc_init_nvm_params_i225function igc_set_eee_i225function speed
Annotated Snippet
if (hw->dev_spec._base.clear_semaphore_once) {
hw->dev_spec._base.clear_semaphore_once = false;
igc_put_hw_semaphore(hw);
for (i = 0; i < timeout; i++) {
swsm = rd32(IGC_SWSM);
if (!(swsm & IGC_SWSM_SMBI))
break;
usleep_range(500, 600);
}
}
/* If we do not have the semaphore here, we have to give up. */
if (i == timeout) {
hw_dbg("Driver can't access device - SMBI bit is set.\n");
return -IGC_ERR_NVM;
}
}
/* Get the FW semaphore. */
for (i = 0; i < timeout; i++) {
swsm = rd32(IGC_SWSM);
wr32(IGC_SWSM, swsm | IGC_SWSM_SWESMBI);
/* Semaphore acquired if bit latched */
if (rd32(IGC_SWSM) & IGC_SWSM_SWESMBI)
break;
usleep_range(500, 600);
}
if (i == timeout) {
/* Release semaphores */
igc_put_hw_semaphore(hw);
hw_dbg("Driver can't access the NVM\n");
return -IGC_ERR_NVM;
}
return 0;
}
/**
* igc_acquire_swfw_sync_i225 - Acquire SW/FW semaphore
* @hw: pointer to the HW structure
* @mask: specifies which semaphore to acquire
*
* Acquire the SW/FW semaphore to access the PHY or NVM. The mask
* will also specify which port we're acquiring the lock for.
*/
s32 igc_acquire_swfw_sync_i225(struct igc_hw *hw, u16 mask)
{
s32 i = 0, timeout = 200;
u32 fwmask = mask << 16;
u32 swmask = mask;
s32 ret_val = 0;
u32 swfw_sync;
while (i < timeout) {
if (igc_get_hw_semaphore_i225(hw)) {
ret_val = -IGC_ERR_SWFW_SYNC;
goto out;
}
swfw_sync = rd32(IGC_SW_FW_SYNC);
if (!(swfw_sync & (fwmask | swmask)))
break;
/* Firmware currently using resource (fwmask) */
igc_put_hw_semaphore(hw);
mdelay(5);
i++;
}
if (i == timeout) {
hw_dbg("Driver can't access resource, SW_FW_SYNC timeout.\n");
ret_val = -IGC_ERR_SWFW_SYNC;
goto out;
}
swfw_sync |= swmask;
wr32(IGC_SW_FW_SYNC, swfw_sync);
igc_put_hw_semaphore(hw);
out:
return ret_val;
}
/**
* igc_release_swfw_sync_i225 - Release SW/FW semaphore
* @hw: pointer to the HW structure
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/delay.h`, `igc_hw.h`.
- Detected declarations: `function igc_acquire_nvm_i225`, `function igc_release_nvm_i225`, `function igc_get_hw_semaphore_i225`, `function igc_acquire_swfw_sync_i225`, `function igc_release_swfw_sync_i225`, `function igc_read_nvm_srrd_i225`, `function igc_write_nvm_srwr`, `function igc_write_nvm_srwr_i225`, `function igc_validate_nvm_checksum_i225`, `function igc_pool_flash_update_done_i225`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.