drivers/net/ethernet/intel/ixgbe/ixgbe_common.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h

File Facts

System: Linux kernel
Corpus path: drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
Extension: .h
Size: 8729 bytes
Lines: 208
Domain: Driver Families
Bucket: drivers/net
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Touches IRQ or DMA behavior; this matters for the representative real-device path.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

ixgbe_type.h
ixgbe.h

Detected Declarations

function ixgbe_removed
function ixgbe_write_reg
function writeq
function ixgbe_write_reg64

Annotated Snippet

#ifndef _IXGBE_COMMON_H_
#define _IXGBE_COMMON_H_

#include "ixgbe_type.h"
#include "ixgbe.h"

u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
int ixgbe_init_hw_generic(struct ixgbe_hw *hw);
int ixgbe_start_hw_generic(struct ixgbe_hw *hw);
int ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
int ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
int ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
				  u32 pba_num_size);
int ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
enum ixgbe_bus_width ixgbe_convert_bus_width(u16 link_status);
enum ixgbe_bus_speed ixgbe_convert_bus_speed(u16 link_status);
int ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
int ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);

int ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
int ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
int ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw);

int ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
int ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
int ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
					       u16 words, u16 *data);
int ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
int ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
				   u16 words, u16 *data);
int ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
int ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
				    u16 words, u16 *data);
int ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
				       u16 *data);
int ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
					      u16 words, u16 *data);
int ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
int ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
					   u16 *checksum_val);
int ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);

int ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
			  u32 enable_addr);
int ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
int ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
int ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw,
				      struct net_device *netdev);
int ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
int ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
int ixgbe_disable_rx_buff_generic(struct ixgbe_hw *hw);
int ixgbe_enable_rx_buff_generic(struct ixgbe_hw *hw);
int ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
int ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
int ixgbe_setup_fc_generic(struct ixgbe_hw *);
bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
void ixgbe_fc_autoneg(struct ixgbe_hw *hw);

int ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);
void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);
int ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
int ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
int ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
int ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
int ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
int ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
			   u32 vind, bool vlan_on, bool vlvf_bypass);
int ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
int ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
				 ixgbe_link_speed *speed,
				 bool *link_up, bool link_up_wait_to_complete);
int ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
				 u16 *wwpn_prefix);

int prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);
int prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);

int ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
int ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
int ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);
int ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
				 u8 build, u8 ver, u16 len, const char *str);
u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
int ixgbe_host_interface_command(struct ixgbe_hw *hw, void *, u32 length,
				 u32 timeout, bool return_data);
int ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 len, u32 timeout);
int ixgbe_fw_phy_activity(struct ixgbe_hw *hw, u16 activity,

Annotation

Immediate include surface: `ixgbe_type.h`, `ixgbe.h`.
Detected declarations: `function ixgbe_removed`, `function ixgbe_write_reg`, `function writeq`, `function ixgbe_write_reg64`.
Atlas domain: Driver Families / drivers/net.
Implementation status: source implementation candidate.
IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.