drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.h- Extension
.h- Size
- 9560 bytes
- Lines
- 317
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
mvpp2.hmvpp2_prs.h
Detected Declarations
struct mvpp2_cls_c2_entrystruct mvpp2_cls_flowstruct mvpp2_cls_flow_entrystruct mvpp2_cls_lookup_entryenum mvpp2_cls_engineenum mvpp2_cls_field_idenum mvpp22_cls_c2_actionenum mvpp22_cls_c2_fwd_actionenum mvpp22_cls_c2_color_actionenum mvpp2_prs_flowenum mvpp2_cls_lu_type
Annotated Snippet
struct mvpp2_cls_c2_entry {
u32 index;
/* TCAM lookup key */
u32 tcam[MVPP2_CLS_C2_TCAM_WORDS];
/* Actions to perform upon TCAM match */
u32 act;
/* Attributes relative to the actions to perform */
u32 attr[MVPP2_CLS_C2_ATTR_WORDS];
/* Entry validity */
u8 valid;
};
#define MVPP22_FLOW_ETHER_BIT BIT(0)
#define MVPP22_FLOW_IP4_BIT BIT(1)
#define MVPP22_FLOW_IP6_BIT BIT(2)
#define MVPP22_FLOW_TCP_BIT BIT(3)
#define MVPP22_FLOW_UDP_BIT BIT(4)
#define MVPP22_FLOW_TCP4 (MVPP22_FLOW_ETHER_BIT | MVPP22_FLOW_IP4_BIT | MVPP22_FLOW_TCP_BIT)
#define MVPP22_FLOW_TCP6 (MVPP22_FLOW_ETHER_BIT | MVPP22_FLOW_IP6_BIT | MVPP22_FLOW_TCP_BIT)
#define MVPP22_FLOW_UDP4 (MVPP22_FLOW_ETHER_BIT | MVPP22_FLOW_IP4_BIT | MVPP22_FLOW_UDP_BIT)
#define MVPP22_FLOW_UDP6 (MVPP22_FLOW_ETHER_BIT | MVPP22_FLOW_IP6_BIT | MVPP22_FLOW_UDP_BIT)
#define MVPP22_FLOW_IP4 (MVPP22_FLOW_ETHER_BIT | MVPP22_FLOW_IP4_BIT)
#define MVPP22_FLOW_IP6 (MVPP22_FLOW_ETHER_BIT | MVPP22_FLOW_IP6_BIT)
#define MVPP22_FLOW_ETHERNET (MVPP22_FLOW_ETHER_BIT)
/* Classifier C2 engine entries */
#define MVPP22_CLS_C2_N_ENTRIES 256
/* Number of per-port dedicated entries in the C2 TCAM */
#define MVPP22_CLS_C2_PORT_N_FLOWS MVPP2_N_RFS_ENTRIES_PER_FLOW
/* Each port has one range per flow type + one entry controlling the global RSS
* setting and the default rx queue
*/
#define MVPP22_CLS_C2_PORT_RANGE (MVPP22_CLS_C2_PORT_N_FLOWS + 1)
#define MVPP22_CLS_C2_PORT_FIRST(p) ((p) * MVPP22_CLS_C2_PORT_RANGE)
#define MVPP22_CLS_C2_RSS_ENTRY(p) (MVPP22_CLS_C2_PORT_FIRST((p) + 1) - 1)
#define MVPP22_CLS_C2_PORT_FLOW_FIRST(p) (MVPP22_CLS_C2_PORT_FIRST(p))
#define MVPP22_CLS_C2_RFS_LOC(p, loc) (MVPP22_CLS_C2_PORT_FLOW_FIRST(p) + (loc))
/* Packet flow ID */
enum mvpp2_prs_flow {
MVPP2_FL_START = 8,
MVPP2_FL_IP4_TCP_NF_UNTAG = MVPP2_FL_START,
MVPP2_FL_IP4_UDP_NF_UNTAG,
MVPP2_FL_IP4_TCP_NF_TAG,
MVPP2_FL_IP4_UDP_NF_TAG,
MVPP2_FL_IP6_TCP_NF_UNTAG,
MVPP2_FL_IP6_UDP_NF_UNTAG,
MVPP2_FL_IP6_TCP_NF_TAG,
MVPP2_FL_IP6_UDP_NF_TAG,
MVPP2_FL_IP4_TCP_FRAG_UNTAG,
MVPP2_FL_IP4_UDP_FRAG_UNTAG,
MVPP2_FL_IP4_TCP_FRAG_TAG,
MVPP2_FL_IP4_UDP_FRAG_TAG,
MVPP2_FL_IP6_TCP_FRAG_UNTAG,
MVPP2_FL_IP6_UDP_FRAG_UNTAG,
MVPP2_FL_IP6_TCP_FRAG_TAG,
MVPP2_FL_IP6_UDP_FRAG_TAG,
MVPP2_FL_IP4_UNTAG, /* non-TCP, non-UDP, same for below */
MVPP2_FL_IP4_TAG,
MVPP2_FL_IP6_UNTAG,
MVPP2_FL_IP6_TAG,
MVPP2_FL_NON_IP_UNTAG,
MVPP2_FL_NON_IP_TAG,
MVPP2_FL_LAST,
};
/* LU Type defined for all engines, and specified in the flow table */
#define MVPP2_CLS_LU_TYPE_MASK 0x3f
enum mvpp2_cls_lu_type {
/* rule->loc is used as a lu-type for the entries 0 - 62. */
MVPP22_CLS_LU_TYPE_ALL = 63,
};
#define MVPP2_N_FLOWS (MVPP2_FL_LAST - MVPP2_FL_START)
struct mvpp2_cls_flow {
/* The L2-L4 traffic flow type */
int flow_type;
/* The first id in the flow table for this flow */
u16 flow_id;
/* The supported HEK fields for this flow */
u16 supported_hash_opts;
Annotation
- Immediate include surface: `mvpp2.h`, `mvpp2_prs.h`.
- Detected declarations: `struct mvpp2_cls_c2_entry`, `struct mvpp2_cls_flow`, `struct mvpp2_cls_flow_entry`, `struct mvpp2_cls_lookup_entry`, `enum mvpp2_cls_engine`, `enum mvpp2_cls_field_id`, `enum mvpp22_cls_c2_action`, `enum mvpp22_cls_c2_fwd_action`, `enum mvpp22_cls_c2_color_action`, `enum mvpp2_prs_flow`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.