drivers/net/ethernet/marvell/octeon_ep/octep_main.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/marvell/octeon_ep/octep_main.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/marvell/octeon_ep/octep_main.h
Extension
.h
Size
11886 bytes
Lines
415
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct octep_mmio {
	/* The physical address to which the PCI address space is mapped. */
	u8 __iomem *hw_addr;

	/* Flag indicating the mapping was successful. */
	int mapped;
};

struct octep_pci_win_regs {
	u8 __iomem *pci_win_wr_addr;
	u8 __iomem *pci_win_rd_addr;
	u8 __iomem *pci_win_wr_data;
	u8 __iomem *pci_win_rd_data;
};

struct octep_hw_ops {
	void (*setup_iq_regs)(struct octep_device *oct, int q);
	int (*setup_oq_regs)(struct octep_device *oct, int q);
	void (*setup_mbox_regs)(struct octep_device *oct, int mbox);

	irqreturn_t (*mbox_intr_handler)(void *ioq_vector);
	irqreturn_t (*oei_intr_handler)(void *ioq_vector);
	irqreturn_t (*ire_intr_handler)(void *ioq_vector);
	irqreturn_t (*ore_intr_handler)(void *ioq_vector);
	irqreturn_t (*vfire_intr_handler)(void *ioq_vector);
	irqreturn_t (*vfore_intr_handler)(void *ioq_vector);
	irqreturn_t (*dma_intr_handler)(void *ioq_vector);
	irqreturn_t (*dma_vf_intr_handler)(void *ioq_vector);
	irqreturn_t (*pp_vf_intr_handler)(void *ioq_vector);
	irqreturn_t (*misc_intr_handler)(void *ioq_vector);
	irqreturn_t (*rsvd_intr_handler)(void *ioq_vector);
	irqreturn_t (*ioq_intr_handler)(void *ioq_vector);
	int (*soft_reset)(struct octep_device *oct);
	void (*reinit_regs)(struct octep_device *oct);
	u32  (*update_iq_read_idx)(struct octep_iq *iq);

	void (*enable_interrupts)(struct octep_device *oct);
	void (*disable_interrupts)(struct octep_device *oct);
	void (*poll_non_ioq_interrupts)(struct octep_device *oct);

	void (*enable_io_queues)(struct octep_device *oct);
	void (*disable_io_queues)(struct octep_device *oct);
	void (*enable_iq)(struct octep_device *oct, int q);
	void (*disable_iq)(struct octep_device *oct, int q);
	void (*enable_oq)(struct octep_device *oct, int q);
	void (*disable_oq)(struct octep_device *oct, int q);
	void (*reset_io_queues)(struct octep_device *oct);
	void (*dump_registers)(struct octep_device *oct);
};

/* Octeon mailbox data */
struct octep_mbox_data {
	u32 cmd;
	u32 total_len;
	u32 recv_len;
	u32 rsvd;
	u64 *data;
};

#define MAX_VF_PF_MBOX_DATA_SIZE 384
/* wrappers around work structs */
struct octep_pfvf_mbox_wk {
	struct work_struct work;
	void *ctxptr;
	u64 ctxul;
};

/* Octeon device mailbox */
struct octep_mbox {
	/* A mutex to protect access to this q_mbox. */
	struct mutex lock;
	u32 vf_id;
	u32 config_data_index;
	u32 message_len;
	u8 __iomem *pf_vf_data_reg;
	u8 __iomem *vf_pf_data_reg;
	struct octep_pfvf_mbox_wk wk;
	struct octep_device *oct;
	struct octep_mbox_data mbox_data;
	u8 config_data[MAX_VF_PF_MBOX_DATA_SIZE];
};

/* Tx/Rx queue vector per interrupt. */
struct octep_ioq_vector {
	char name[OCTEP_MSIX_NAME_SIZE];
	struct napi_struct napi;
	struct octep_device *octep_dev;
	struct octep_iq *iq;
	struct octep_oq *oq;
	cpumask_t affinity_mask;

Annotation

Implementation Notes