drivers/net/ethernet/marvell/octeon_ep/octep_regs_cnxk_pf.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/marvell/octeon_ep/octep_regs_cnxk_pf.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/marvell/octeon_ep/octep_regs_cnxk_pf.h
Extension
.h
Size
18539 bytes
Lines
419
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _OCTEP_REGS_CNXK_PF_H_
#define _OCTEP_REGS_CNXK_PF_H_

/* ############################ RST ######################### */
#define    CNXK_RST_BOOT               0x000087E006001600ULL
#define    CNXK_RST_CHIP_DOMAIN_W1S    0x000087E006001810ULL
#define    CNXK_RST_CORE_DOMAIN_W1S    0x000087E006001820ULL
#define    CNXK_RST_CORE_DOMAIN_W1C    0x000087E006001828ULL

#define     CNXK_CONFIG_XPANSION_BAR             0x38
#define     CNXK_CONFIG_PCIE_CAP                 0x70
#define     CNXK_CONFIG_PCIE_DEVCAP              0x74
#define     CNXK_CONFIG_PCIE_DEVCTL              0x78
#define     CNXK_CONFIG_PCIE_LINKCAP             0x7C
#define     CNXK_CONFIG_PCIE_LINKCTL             0x80
#define     CNXK_CONFIG_PCIE_SLOTCAP             0x84
#define     CNXK_CONFIG_PCIE_SLOTCTL             0x88

#define     CNXK_PCIE_SRIOV_FDL                  0x188      /* 0x98 */
#define     CNXK_PCIE_SRIOV_FDL_BIT_POS          0x10
#define     CNXK_PCIE_SRIOV_FDL_MASK             0xFF

#define     CNXK_CONFIG_PCIE_FLTMSK              0x720

/* ################# Offsets of RING, EPF, MAC ######################### */
#define    CNXK_RING_OFFSET                      (0x1ULL << 17)
#define    CNXK_EPF_OFFSET                       (0x1ULL << 25)
#define    CNXK_MAC_OFFSET                       (0x1ULL << 4)
#define    CNXK_BIT_ARRAY_OFFSET                 (0x1ULL << 4)
#define    CNXK_EPVF_RING_OFFSET                 (0x1ULL << 4)

/* ################# Scratch Registers ######################### */
#define    CNXK_SDP_EPF_SCRATCH                  0x209E0

/* ################# Window Registers ######################### */
#define    CNXK_SDP_WIN_WR_ADDR64                0x20000
#define    CNXK_SDP_WIN_RD_ADDR64                0x20010
#define    CNXK_SDP_WIN_WR_DATA64                0x20020
#define    CNXK_SDP_WIN_WR_MASK_REG              0x20030
#define    CNXK_SDP_WIN_RD_DATA64                0x20040

#define    CNXK_SDP_MAC_NUMBER                   0x2C100

/* ################# Global Previliged registers ######################### */
#define    CNXK_SDP_EPF_RINFO                    0x209F0

#define    CNXK_SDP_EPF_RINFO_SRN(val)           ((val) & 0x7F)
#define    CNXK_SDP_EPF_RINFO_RPVF(val)          (((val) >> 32) & 0xF)
#define    CNXK_SDP_EPF_RINFO_NVFS(val)          (((val) >> 48) & 0x7F)

/* SDP Function select */
#define    CNXK_SDP_FUNC_SEL_EPF_BIT_POS         7
#define    CNXK_SDP_FUNC_SEL_FUNC_BIT_POS        0

/* ##### RING IN (Into device from PCI: Tx Ring) REGISTERS #### */
#define    CNXK_SDP_R_IN_CONTROL_START           0x10000
#define    CNXK_SDP_R_IN_ENABLE_START            0x10010
#define    CNXK_SDP_R_IN_INSTR_BADDR_START       0x10020
#define    CNXK_SDP_R_IN_INSTR_RSIZE_START       0x10030
#define    CNXK_SDP_R_IN_INSTR_DBELL_START       0x10040
#define    CNXK_SDP_R_IN_CNTS_START              0x10050
#define    CNXK_SDP_R_IN_INT_LEVELS_START        0x10060
#define    CNXK_SDP_R_IN_PKT_CNT_START           0x10080
#define    CNXK_SDP_R_IN_BYTE_CNT_START          0x10090

#define    CNXK_SDP_R_IN_CONTROL(ring)		\
	(CNXK_SDP_R_IN_CONTROL_START + ((ring) * CNXK_RING_OFFSET))

#define    CNXK_SDP_R_IN_ENABLE(ring)		\
	(CNXK_SDP_R_IN_ENABLE_START + ((ring) * CNXK_RING_OFFSET))

#define    CNXK_SDP_R_IN_INSTR_BADDR(ring)	\
	(CNXK_SDP_R_IN_INSTR_BADDR_START + ((ring) * CNXK_RING_OFFSET))

#define    CNXK_SDP_R_IN_INSTR_RSIZE(ring)	\
	(CNXK_SDP_R_IN_INSTR_RSIZE_START + ((ring) * CNXK_RING_OFFSET))

#define    CNXK_SDP_R_IN_INSTR_DBELL(ring)	\
	(CNXK_SDP_R_IN_INSTR_DBELL_START + ((ring) * CNXK_RING_OFFSET))

#define    CNXK_SDP_R_IN_CNTS(ring)		\
	(CNXK_SDP_R_IN_CNTS_START + ((ring) * CNXK_RING_OFFSET))

#define    CNXK_SDP_R_IN_INT_LEVELS(ring)	\
	(CNXK_SDP_R_IN_INT_LEVELS_START + ((ring) * CNXK_RING_OFFSET))

#define    CNXK_SDP_R_IN_PKT_CNT(ring)		\
	(CNXK_SDP_R_IN_PKT_CNT_START + ((ring) * CNXK_RING_OFFSET))

#define    CNXK_SDP_R_IN_BYTE_CNT(ring)		\

Annotation

Implementation Notes