drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h- Extension
.h- Size
- 13123 bytes
- Lines
- 381
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct nix_cn20k_sq_ctx_sstruct nix_cn20k_cq_ctx_sstruct nix_cn20k_rq_ctx_sstruct npa_cn20k_aura_sstruct npa_cn20k_pool_senum rvu_mbox_pf_int_vec_eenum rvu_af_cn20k_int_vec_e
Annotated Snippet
struct nix_cn20k_sq_ctx_s {
u64 ena : 1; /* W0 */
u64 qint_idx : 6;
u64 substream : 20;
u64 sdp_mcast : 1;
u64 cq : 20;
u64 sqe_way_mask : 16;
u64 smq : 11; /* W1 */
u64 cq_ena : 1;
u64 xoff : 1;
u64 sso_ena : 1;
u64 smq_rr_weight : 14;
u64 default_chan : 12;
u64 sqb_count : 16;
u64 reserved_120_120 : 1;
u64 smq_rr_count_lb : 7;
u64 smq_rr_count_ub : 25; /* W2 */
u64 sqb_aura : 20;
u64 sq_int : 8;
u64 sq_int_ena : 8;
u64 sqe_stype : 2;
u64 reserved_191_191 : 1;
u64 max_sqe_size : 2; /* W3 */
u64 cq_limit : 8;
u64 lmt_dis : 1;
u64 mnq_dis : 1;
u64 smq_next_sq : 20;
u64 smq_lso_segnum : 8;
u64 tail_offset : 6;
u64 smenq_offset : 6;
u64 head_offset : 6;
u64 smenq_next_sqb_vld : 1;
u64 smq_pend : 1;
u64 smq_next_sq_vld : 1;
u64 reserved_253_255 : 3;
u64 next_sqb : 64; /* W4 */
u64 tail_sqb : 64; /* W5 */
u64 smenq_sqb : 64; /* W6 */
u64 smenq_next_sqb : 64; /* W7 */
u64 head_sqb : 64; /* W8 */
u64 reserved_576_583 : 8; /* W9 */
u64 vfi_lso_total : 18;
u64 vfi_lso_sizem1 : 3;
u64 vfi_lso_sb : 8;
u64 vfi_lso_mps : 14;
u64 vfi_lso_vlan0_ins_ena : 1;
u64 vfi_lso_vlan1_ins_ena : 1;
u64 vfi_lso_vld : 1;
u64 reserved_630_639 : 10;
u64 scm_lso_rem : 18; /* W10 */
u64 reserved_658_703 : 46;
u64 octs : 48; /* W11 */
u64 reserved_752_767 : 16;
u64 pkts : 48; /* W12 */
u64 reserved_816_831 : 16;
u64 aged_drop_octs : 32; /* W13 */
u64 aged_drop_pkts : 32;
u64 dropped_octs : 48; /* W14 */
u64 reserved_944_959 : 16;
u64 dropped_pkts : 48; /* W15 */
u64 reserved_1008_1023 : 16;
};
static_assert(sizeof(struct nix_cn20k_sq_ctx_s) == NIX_MAX_CTX_SIZE);
struct nix_cn20k_cq_ctx_s {
u64 base : 64; /* W0 */
u64 lbp_ena : 1; /* W1 */
u64 lbpid_low : 3;
u64 bp_ena : 1;
u64 lbpid_med : 3;
u64 bpid : 9;
u64 lbpid_high : 3;
u64 qint_idx : 7;
u64 cq_err : 1;
u64 cint_idx : 7;
u64 avg_con : 9;
u64 wrptr : 20;
u64 tail : 20; /* W2 */
u64 head : 20;
u64 avg_level : 8;
u64 update_time : 16;
u64 bp : 8; /* W3 */
u64 drop : 8;
u64 drop_ena : 1;
u64 ena : 1;
u64 cpt_drop_err_en : 1;
u64 reserved_211_211 : 1;
u64 msh_dst : 11;
u64 msh_valid : 1;
Annotation
- Detected declarations: `struct nix_cn20k_sq_ctx_s`, `struct nix_cn20k_cq_ctx_s`, `struct nix_cn20k_rq_ctx_s`, `struct npa_cn20k_aura_s`, `struct npa_cn20k_pool_s`, `enum rvu_mbox_pf_int_vec_e`, `enum rvu_af_cn20k_int_vec_e`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.